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2009-03-05	Matthijs Kooijman	Remove getDesignFiles from the VHDLState monad.	commit \| commitdiff \| tree
2009-03-05	Matthijs Kooijman	Strip adjacent underscores from VHDLIds.	commit \| commitdiff \| tree
2009-03-04	Matthijs Kooijman	Provide preliminary support for list types.	commit \| commitdiff \| tree
2009-03-04	Matthijs Kooijman	Add some hardware models using vectors (FSVec).	commit \| commitdiff \| tree
2009-03-04	Matthijs Kooijman	Fix propagateState removing all non-FApp SigDefs.	commit \| commitdiff \| tree
2009-03-04	Matthijs Kooijman	Map the clk port on stateful function applications.	commit \| commitdiff \| tree
2009-03-04	Matthijs Kooijman	Don't inline alu.	commit \| commitdiff \| tree
2009-03-04	Matthijs Kooijman	Remove support for DontCare.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Fill in propagateState.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Remove the now obsolete getOwnStates.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Add some predicates and accessors to FlattenTypes.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Let VHDL use SignalInfo instead of HsFunction for generating...	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Add initial (dummy) propagateState function.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Add vim modeline.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Add a is_FApp predicate.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Never inline the half_adder function.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Add StandalonDeriving language option to Pretty.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Don't add duplicate name hints.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Put VHDL files for each design in a separate directory.	commit \| commitdiff \| tree
2009-03-03	Matthijs Kooijman	Allow for generating VHDL for stateless functions.	commit \| commitdiff \| tree
2009-02-27	Matthijs Kooijman	Add some newlines in the output.	commit \| commitdiff \| tree
2009-02-27	Matthijs Kooijman	Make exec have a single binding.	commit \| commitdiff \| tree
2009-02-27	Matthijs Kooijman	Add a two-port mux hardware model.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Write each VHDL entity to a seperate file.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Let the exec function output something.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Support construction of empty tuples.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Print the list of signals sorted by id.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Also allow uppercase letters and a period in VHDL ids.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Add name hints to various signals generated.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Strip invalid characters from VHDL identifiers.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Use the name hints in signal name construction.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Do the naming of a signal in named function instead...	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Allow name hints to be set for a signal.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Enable the DontCare value for Bit again.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Print the Defs list sorted.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Make register_bank work, with a bunch of changes.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Let zipValueMapsWith show the trees in the error.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Use tuples instead of a ADT for the register bank state.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Add space in error message.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Make listBind also show a pretty printed output.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Further reduce main and add a makeVHDL function.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Support multiple alternative case expressions.	commit \| commitdiff \| tree
2009-02-19	Matthijs Kooijman	Add stateful alu (with empty state).	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Add a simple four-bit shift register model.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Use a different approach for marking SigUses.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Add setSignalInfo accessor for FlattenState.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Generate VHDL for UncondDefs.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Add a getSignalInfo accessor.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Add a listBind function to show the Core for a bind.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Split out the large main function a bit.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Remove the DontCare value from the Bit type.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Derive and use show instead of ppr to display Exprs.	commit \| commitdiff \| tree
2009-02-18	Matthijs Kooijman	Fix comment indent.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Generalize FApp and CondDef into SigDef and add UncondDef.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Add a type alias StateId for state numbers.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Remove type parameterisation of SignalMap.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Don't generate ports for non-port signals.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Generate VHDL signals for internal signals and state.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Add predicates for SigUse.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Mark all signals as ports or states when appropriate.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Always import IEEE.std_logic_1164 in the generated...	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Move the DesignFile creation to VHDL.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Add clk port on any stateful entity.	commit \| commitdiff \| tree
2009-02-17	Matthijs Kooijman	Create state procs for state signals.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Mark port signals as such during flattening.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Improve the pretty output of the signal list.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Make the pretty output more pretty.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Reduce genSignals to a single line using Traversable.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Store a use for each signal in a flattened function.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Add port maps to component instantiations.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Make application names unique.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Add Entities for builtin functions.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Let mkCompInsSm look up the actual VHDL entity id.	commit \| commitdiff \| tree
2009-02-16	Matthijs Kooijman	Put mkCompInsSm in the VHDLState monad.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Make modFuncs work with stateful functions.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Generalize some session modification functions.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Generate dummy component instantiations for each architecture.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Move some pretty printing code around.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Use less general names as labels some fields.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Generate a VHDL architecture for each function.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Add port declarations to the VHDL entities.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Put a TypeMark in a VHDLSignalmap.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Rename fields of SignalInfo.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Store the Haskell Type in SignalInfo.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Add the VHDLTypes module	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Extract entities from the session and return them in...	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Generate VHDL entity declarations.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Create an entity for each function.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Store signals in a map.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Name signals in a function after flattening it.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Add a modFunc function to edit a function in the session.	commit \| commitdiff \| tree
2009-02-13	Matthijs Kooijman	Remove NamedFlatFunction again.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Allow a FlatFunction to be named as well as unnamed.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Fill the signal list in FlatFunction.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Add a list of used signals to FlatFunction.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Remove the distinction between SignalDef and SignalUse.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Make FlatFunction parameterized with the signal id...	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Move around a bunch of types.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Add more builtin functions.	commit \| commitdiff \| tree
2009-02-11	Matthijs Kooijman	Only force a stateful interface for top level functions.	commit \| commitdiff \| tree
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