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matthijs/master-project/cλash.git
2009-02-19
Matthijs Kooijman
Let zipValueMapsWith show the trees in the error.
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2009-02-19
Matthijs Kooijman
Use tuples instead of a ADT for the register bank state.
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2009-02-19
Matthijs Kooijman
Add space in error message.
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2009-02-19
Matthijs Kooijman
Make listBind also show a pretty printed output.
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2009-02-19
Matthijs Kooijman
Further reduce main and add a makeVHDL function.
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2009-02-19
Matthijs Kooijman
Support multiple alternative case expressions.
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2009-02-19
Matthijs Kooijman
Add stateful alu (with empty state).
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2009-02-18
Matthijs Kooijman
Add a simple four-bit shift register model.
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2009-02-18
Matthijs Kooijman
Use a different approach for marking SigUses.
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2009-02-18
Matthijs Kooijman
Add setSignalInfo accessor for FlattenState.
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2009-02-18
Matthijs Kooijman
Generate VHDL for UncondDefs.
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2009-02-18
Matthijs Kooijman
Add a getSignalInfo accessor.
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2009-02-18
Matthijs Kooijman
Add a listBind function to show the Core for a bind.
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2009-02-18
Matthijs Kooijman
Split out the large main function a bit.
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2009-02-18
Matthijs Kooijman
Remove the DontCare value from the Bit type.
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2009-02-18
Matthijs Kooijman
Derive and use show instead of ppr to display Exprs.
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2009-02-18
Matthijs Kooijman
Fix comment indent.
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2009-02-17
Matthijs Kooijman
Generalize FApp and CondDef into SigDef and add UncondDef.
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2009-02-17
Matthijs Kooijman
Add a type alias StateId for state numbers.
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2009-02-17
Matthijs Kooijman
Remove type parameterisation of SignalMap.
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2009-02-17
Matthijs Kooijman
Don't generate ports for non-port signals.
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2009-02-17
Matthijs Kooijman
Generate VHDL signals for internal signals and state.
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2009-02-17
Matthijs Kooijman
Add predicates for SigUse.
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2009-02-17
Matthijs Kooijman
Mark all signals as ports or states when appropriate.
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2009-02-17
Matthijs Kooijman
Always import IEEE.std_logic_1164 in the generated...
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2009-02-17
Matthijs Kooijman
Move the DesignFile creation to VHDL.
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2009-02-17
Matthijs Kooijman
Add clk port on any stateful entity.
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2009-02-17
Matthijs Kooijman
Create state procs for state signals.
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2009-02-16
Matthijs Kooijman
Mark port signals as such during flattening.
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2009-02-16
Matthijs Kooijman
Improve the pretty output of the signal list.
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2009-02-16
Matthijs Kooijman
Make the pretty output more pretty.
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2009-02-16
Matthijs Kooijman
Reduce genSignals to a single line using Traversable.
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2009-02-16
Matthijs Kooijman
Store a use for each signal in a flattened function.
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2009-02-16
Matthijs Kooijman
Add port maps to component instantiations.
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2009-02-16
Matthijs Kooijman
Make application names unique.
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2009-02-16
Matthijs Kooijman
Add Entities for builtin functions.
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2009-02-16
Matthijs Kooijman
Let mkCompInsSm look up the actual VHDL entity id.
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2009-02-16
Matthijs Kooijman
Put mkCompInsSm in the VHDLState monad.
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2009-02-13
Matthijs Kooijman
Make modFuncs work with stateful functions.
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2009-02-13
Matthijs Kooijman
Generalize some session modification functions.
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2009-02-13
Matthijs Kooijman
Generate dummy component instantiations for each archit...
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2009-02-13
Matthijs Kooijman
Move some pretty printing code around.
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2009-02-13
Matthijs Kooijman
Use less general names as labels some fields.
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2009-02-13
Matthijs Kooijman
Generate a VHDL architecture for each function.
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2009-02-13
Matthijs Kooijman
Add port declarations to the VHDL entities.
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2009-02-13
Matthijs Kooijman
Put a TypeMark in a VHDLSignalmap.
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2009-02-13
Matthijs Kooijman
Rename fields of SignalInfo.
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2009-02-13
Matthijs Kooijman
Store the Haskell Type in SignalInfo.
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2009-02-13
Matthijs Kooijman
Add the VHDLTypes module
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2009-02-13
Matthijs Kooijman
Extract entities from the session and return them in...
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2009-02-13
Matthijs Kooijman
Generate VHDL entity declarations.
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2009-02-13
Matthijs Kooijman
Create an entity for each function.
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2009-02-13
Matthijs Kooijman
Store signals in a map.
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2009-02-13
Matthijs Kooijman
Name signals in a function after flattening it.
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2009-02-13
Matthijs Kooijman
Add a modFunc function to edit a function in the session.
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2009-02-13
Matthijs Kooijman
Remove NamedFlatFunction again.
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2009-02-11
Matthijs Kooijman
Allow a FlatFunction to be named as well as unnamed.
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2009-02-11
Matthijs Kooijman
Fill the signal list in FlatFunction.
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2009-02-11
Matthijs Kooijman
Add a list of used signals to FlatFunction.
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2009-02-11
Matthijs Kooijman
Remove the distinction between SignalDef and SignalUse.
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2009-02-11
Matthijs Kooijman
Make FlatFunction parameterized with the signal id...
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2009-02-11
Matthijs Kooijman
Move around a bunch of types.
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2009-02-11
Matthijs Kooijman
Add more builtin functions.
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2009-02-11
Matthijs Kooijman
Only force a stateful interface for top level functions.
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2009-02-11
Matthijs Kooijman
Add facilities for builtin functions.
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2009-02-11
Matthijs Kooijman
Add a setFlatFunc function.
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2009-02-11
Matthijs Kooijman
Make the flatfunc in FuncMap optional.
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2009-02-11
Matthijs Kooijman
Replace FuncMap by a Data.Map.
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2009-02-11
Matthijs Kooijman
Derive Ord for HsFunction.
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2009-02-11
Matthijs Kooijman
Implement resolvFunc.
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2009-02-11
Matthijs Kooijman
Add getFunc session accessor.
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2009-02-11
Matthijs Kooijman
Add the current CoreModule to the session.
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2009-02-11
Matthijs Kooijman
Replace printBind* by a Pretty instance.
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2009-02-11
Matthijs Kooijman
Add Pretty instance for VHDLSession.
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2009-02-11
Matthijs Kooijman
Greatly clean up Translator.
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2009-02-11
Matthijs Kooijman
Give stateless a type signature.
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2009-02-11
Matthijs Kooijman
Add pretty printing functions for FlatFunction.
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2009-02-11
Matthijs Kooijman
Learn flattenExpr about single alt Case expressions.
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2009-02-11
Matthijs Kooijman
Learn flattenExpr about Let expressions.
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2009-02-11
Matthijs Kooijman
Learn flattenExpr about building tuples.
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2009-02-11
Matthijs Kooijman
Learn flattenExpr to flatten normal applications.
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2009-02-11
Matthijs Kooijman
Add useAsPort and useAsState functions.
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2009-02-09
Matthijs Kooijman
Add defMapTouseMap function.
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2009-02-09
Matthijs Kooijman
Make HsValueMap an instance of Functor.
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2009-02-09
Matthijs Kooijman
Learn flattenExpr about function application.
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2009-02-09
Matthijs Kooijman
Make flattenExpr return signal definitions for arguments.
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2009-02-09
Matthijs Kooijman
Learn flattenExpr about Var expressions.
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2009-02-09
Matthijs Kooijman
Learn flattenExpr about Lambda expressions.
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2009-02-06
Matthijs Kooijman
Add a BindMap argument to flattenExpr.
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2009-02-06
Matthijs Kooijman
Add accessor methods for FlattenState.
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2009-02-06
Matthijs Kooijman
Add flattenFunction and flattenExpr.
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2009-02-06
Matthijs Kooijman
Add a new module "Flatten".
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2009-02-06
Matthijs Kooijman
Let Translator.hs export everything.
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2009-02-05
Matthijs Kooijman
Name the module in Translator.hs Translator.
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2009-02-05
Matthijs Kooijman
Remove the export list from the Alu module.
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2009-02-05
Matthijs Kooijman
Make the arguments of the alu function curried.
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2009-02-05
Matthijs Kooijman
Remove the empty state of the alu function.
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2009-02-03
Matthijs Kooijman
Create a VHDL proc for each state variable.
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2009-02-03
Matthijs Kooijman
Generate a list of state, signal pairs as a side effect...
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2009-02-03
Matthijs Kooijman
Match input and output state using ints.
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