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Clean up the code a bit more.
[matthijs/master-project/cλash.git]
/
VHDL.hs
2009-06-24
Matthijs Kooijman
Clean up the code a bit more.
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2009-06-23
Christiaan Baaij
Always use everything declared in VHDL work library
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2009-06-23
Christiaan Baaij
Started cleanup of VHDL.hs and some builtin funcs now...
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2009-06-23
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-23
Matthijs Kooijman
Make mkConcSm support a = b style bindings.
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2009-06-23
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-23
Christiaan Baaij
Map generations always maps clk port
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2009-06-23
Matthijs Kooijman
Merge git://github.com/darchon/clash into cλash
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2009-06-23
Matthijs Kooijman
Support turning dataconstructors into VHDL constants.
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2009-06-23
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-23
Christiaan Baaij
Added singleton
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2009-06-23
Matthijs Kooijman
Use varToVHDLExpr in mkConcSm.
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2009-06-23
Matthijs Kooijman
Merge git://github.com/darchon/clash into cλash
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2009-06-23
Matthijs Kooijman
Ignore cast expressions when generating VHDL.
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2009-06-23
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-23
Christiaan Baaij
Almost finished support for 'map'
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2009-06-23
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-23
Matthijs Kooijman
Merge git://github.com/darchon/clash into cλash
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2009-06-23
Matthijs Kooijman
Always add a clk port map on instantiations.
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2009-06-23
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-23
Christiaan Baaij
Added support for empty TFVec's, Added Some more builti...
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2009-06-23
Matthijs Kooijman
Prepend "comp_ins_" to component instantiation labels.
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2009-06-23
Matthijs Kooijman
Remove dummy mkConcSm clause for r = r bindings.
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2009-06-23
Matthijs Kooijman
Return multiple statements instead of a block.
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2009-06-23
Matthijs Kooijman
Let mkConcSm return a list of ConcSms.
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2009-06-23
Matthijs Kooijman
Don't generate a signal for the output port.
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2009-06-22
Christiaan Baaij
Updated support for RangedWords, Requires new branch...
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2009-06-22
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-22
Matthijs Kooijman
Append the Unique to generated VHDL entity id's.
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2009-06-22
Matthijs Kooijman
Generate the VHDLId of an entity in a single place.
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2009-06-22
Matthijs Kooijman
Remove the old builtin function support.
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2009-06-22
Christiaan Baaij
Filter non-value variables for built-in functions
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2009-06-22
Matthijs Kooijman
Merge git://github.com/darchon/clash into cλash
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2009-06-22
Matthijs Kooijman
Add error message to mkConcSm for unsupported expressions.
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2009-06-22
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-22
Christiaan Baaij
Added support for vectors with arbitrary element types
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2009-06-22
Matthijs Kooijman
Check parameter counts in mkConcSm instead of the actua...
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2009-06-22
Matthijs Kooijman
Fix typo.
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2009-06-22
Christiaan Baaij
Added subtype declarations to TypeMap, removed SubtypeMap.
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2009-06-22
Matthijs Kooijman
Support application of dataconstructors.
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2009-06-22
Matthijs Kooijman
Make mkAssign support assigning to a VHDLName as well.
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2009-06-22
Matthijs Kooijman
Split off record field selection AST construction.
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2009-06-22
Matthijs Kooijman
Only try to generate builtin functions for global binders.
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2009-06-22
Matthijs Kooijman
Split off assignment generating code.
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2009-06-22
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-21
Matthijs Kooijman
Support single-alt selector case expressions.
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2009-06-21
Matthijs Kooijman
Support single-constructor algebraic types.
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2009-06-21
Matthijs Kooijman
Move type registration out of construct_vhdl_ty.
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2009-06-21
Matthijs Kooijman
Split off the VHDL type generating code.
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2009-06-19
Christiaan Baaij
Added support for RangedWords
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2009-06-19
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-19
Christiaan Baaij
Added function calls
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2009-06-19
Matthijs Kooijman
Support VHDL generation for two-alternative cases.
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2009-06-19
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-06-19
Christiaan Baaij
Started adding builtin functions
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2009-06-19
Christiaan Baaij
Cabalized clash
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2009-06-15
Matthijs Kooijman
Generate VHDL from Core instead of flat functions.
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2009-04-14
Matthijs Kooijman
Generate VHDL typecasts for literals when needed.
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2009-04-14
Matthijs Kooijman
Put mkConcSm inside the VHDLState monad.
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2009-04-14
Matthijs Kooijman
Add a Type to a Literal SignalExpr.
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2009-04-09
Matthijs Kooijman
Generalize VHDL type creation for SizedWord and FSVec.
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2009-04-09
Matthijs Kooijman
Add (non-working) support for SizedWord literals.
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2009-04-09
Matthijs Kooijman
Translate the SizedWord type to a VHDL vector.
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2009-04-06
Matthijs Kooijman
Use basic identifiers for builtins.
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2009-04-06
Matthijs Kooijman
Use extended VHDL identifiers where possible.
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2009-04-06
Matthijs Kooijman
Use the actual FSVec length to create VHDL vectors.
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2009-04-06
Matthijs Kooijman
Cleanup imports and add a vim modeline.
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2009-03-10
Matthijs Kooijman
Add a TODO.
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2009-03-10
Matthijs Kooijman
Remove a few stale TODOs.
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2009-03-10
Matthijs Kooijman
Import the ieee library into the generated types package.
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2009-03-10
Matthijs Kooijman
Filter out dots from generated type id's.
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2009-03-10
Matthijs Kooijman
Put vhdl_ty in the (new) TypeState Monad.
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2009-03-10
Matthijs Kooijman
Output a package containing all type declarations.
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2009-03-10
Matthijs Kooijman
Add support for builtin functions again.
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2009-03-10
Matthijs Kooijman
Redo the global (state) structure of the translator.
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2009-03-09
Matthijs Kooijman
Use Data.Accessor for FuncData.
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2009-03-09
Matthijs Kooijman
Remove createArchitecture from the VHDLState Monad.
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2009-03-09
Matthijs Kooijman
Remove mkConcSm from the VHDLState monad.
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2009-03-09
Matthijs Kooijman
Make createEntity preserve the Entity on builtin functions.
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2009-03-05
Matthijs Kooijman
Remove createEntity from the VHDLState monad.
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2009-03-05
Matthijs Kooijman
Remove getDesignFiles from the VHDLState monad.
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2009-03-05
Matthijs Kooijman
Strip adjacent underscores from VHDLIds.
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2009-03-04
Matthijs Kooijman
Provide preliminary support for list types.
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2009-03-04
Matthijs Kooijman
Map the clk port on stateful function applications.
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2009-03-03
Matthijs Kooijman
Let VHDL use SignalInfo instead of HsFunction for gener...
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2009-02-19
Matthijs Kooijman
Write each VHDL entity to a seperate file.
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2009-02-19
Matthijs Kooijman
Also allow uppercase letters and a period in VHDL ids.
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2009-02-19
Matthijs Kooijman
Strip invalid characters from VHDL identifiers.
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2009-02-19
Matthijs Kooijman
Enable the DontCare value for Bit again.
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2009-02-19
Matthijs Kooijman
Make register_bank work, with a bunch of changes.
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2009-02-19
Matthijs Kooijman
Support multiple alternative case expressions.
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2009-02-18
Matthijs Kooijman
Generate VHDL for UncondDefs.
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2009-02-17
Matthijs Kooijman
Generalize FApp and CondDef into SigDef and add UncondDef.
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2009-02-17
Matthijs Kooijman
Add a type alias StateId for state numbers.
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2009-02-17
Matthijs Kooijman
Remove type parameterisation of SignalMap.
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2009-02-17
Matthijs Kooijman
Don't generate ports for non-port signals.
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2009-02-17
Matthijs Kooijman
Generate VHDL signals for internal signals and state.
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2009-02-17
Matthijs Kooijman
Always import IEEE.std_logic_1164 in the generated...
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2009-02-17
Matthijs Kooijman
Move the DesignFile creation to VHDL.
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2009-02-17
Matthijs Kooijman
Add clk port on any stateful entity.
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