matthijs/master-project/cλash.git
15 years agoAdded function calls
Christiaan Baaij [Fri, 19 Jun 2009 11:22:06 +0000 (13:22 +0200)]
Added function calls

15 years agoMerge branch 'cλash' of http://git.stderr.nl/matthijs/projects/master-project
Christiaan Baaij [Fri, 19 Jun 2009 10:17:44 +0000 (12:17 +0200)]
Merge branch 'cλash' of git.stderr.nl/matthijs/projects/master-project

* 'cλash' of http://git.stderr.nl/matthijs/projects/master-project:
  Use highordtest in main, since that can now be normalized.
  Add a (fairly complete) set of transforms.
  Add is_lam and is_fun predicates.
  Add a inlinebind helper function.
  Add a substitute helper function.
  Print the type in the transform debug output.
  Add infrastructure for running core to core transformations.
  Add a higher order testcase.
  Add is_wild function to check for wild binders.
  Generate VHDL from Core instead of flat functions.

Conflicts:
Translator.hs
VHDL.hs

15 years agoStarted adding builtin functions
Christiaan Baaij [Fri, 19 Jun 2009 10:11:49 +0000 (12:11 +0200)]
Started adding builtin functions

15 years agoCabalized clash
Christiaan Baaij [Fri, 19 Jun 2009 08:26:52 +0000 (10:26 +0200)]
Cabalized clash

15 years agoAdded global vector function generation
Christiaan Baaij [Fri, 19 Jun 2009 08:13:43 +0000 (10:13 +0200)]
Added global vector function generation

15 years agoUse highordtest in main, since that can now be normalized.
Matthijs Kooijman [Thu, 18 Jun 2009 13:27:28 +0000 (15:27 +0200)]
Use highordtest in main, since that can now be normalized.

15 years agoAdd a (fairly complete) set of transforms.
Matthijs Kooijman [Thu, 18 Jun 2009 13:26:38 +0000 (15:26 +0200)]
Add a (fairly complete) set of transforms.

These transforms should normalize most core programs, though this was not
confirmed yet. Also, they do not use any cross-function transforming.

15 years agoAdd is_lam and is_fun predicates.
Matthijs Kooijman [Thu, 18 Jun 2009 12:55:14 +0000 (14:55 +0200)]
Add is_lam and is_fun predicates.

15 years agoAdd a inlinebind helper function.
Matthijs Kooijman [Thu, 18 Jun 2009 12:48:36 +0000 (14:48 +0200)]
Add a inlinebind helper function.

This function can create a transformation that will inline some bindings
in a let expression, based on a condition function passed in.

15 years agoAdd a substitute helper function.
Matthijs Kooijman [Thu, 18 Jun 2009 12:47:56 +0000 (14:47 +0200)]
Add a substitute helper function.

This function performs a number of substitutions on a CoreExpr, by using
the CoreSubst module.

15 years agoPrint the type in the transform debug output.
Matthijs Kooijman [Thu, 18 Jun 2009 12:47:15 +0000 (14:47 +0200)]
Print the type in the transform debug output.

15 years agoAdd infrastructure for running core to core transformations.
Matthijs Kooijman [Thu, 18 Jun 2009 09:30:12 +0000 (11:30 +0200)]
Add infrastructure for running core to core transformations.

This does not add any actual transformations, just the supporting
functions and functions to run the transformations.

15 years agoAdd a higher order testcase.
Matthijs Kooijman [Thu, 18 Jun 2009 08:59:26 +0000 (10:59 +0200)]
Add a higher order testcase.

This testcase is taken from my report and uses some higher order
constructs.

15 years agoAdd is_wild function to check for wild binders.
Matthijs Kooijman [Thu, 18 Jun 2009 08:58:54 +0000 (10:58 +0200)]
Add is_wild function to check for wild binders.

15 years agoGenerate VHDL from Core instead of flat functions.
Matthijs Kooijman [Mon, 15 Jun 2009 11:42:33 +0000 (13:42 +0200)]
Generate VHDL from Core instead of flat functions.

This bypasses all of the Flatten functionality for now and generates VHDL
directly. The generation only works on very simple Core programs, that are
already in normal form. An example of such a program is the inv function
in Adders.hs.

For now, all state generation is broken again. Support for ValueMaps has
mostly been removed, since in the future tuples will be translated to
records in VHDL instead of being flattened.

15 years agoMake listBind support recursive bindings.
Matthijs Kooijman [Fri, 12 Jun 2009 12:02:01 +0000 (14:02 +0200)]
Make listBind support recursive bindings.

This allows listBind to process non-simplified Core modules.

15 years agoUpdate the hardware models a bit.
Matthijs Kooijman [Mon, 25 May 2009 09:58:23 +0000 (11:58 +0200)]
Update the hardware models a bit.

15 years agoSupport binding the scrutinee of a Case expression.
Matthijs Kooijman [Thu, 16 Apr 2009 08:00:14 +0000 (10:00 +0200)]
Support binding the scrutinee of a Case expression.

15 years agoDerive Show CoreSyn.Note.
Matthijs Kooijman [Wed, 15 Apr 2009 08:40:11 +0000 (10:40 +0200)]
Derive Show CoreSyn.Note.

15 years agoLet VHDL generate a typecast for SizedWord literals.
Matthijs Kooijman [Tue, 14 Apr 2009 09:51:58 +0000 (11:51 +0200)]
Let VHDL generate a typecast for SizedWord literals.

15 years agoGenerate VHDL typecasts for literals when needed.
Matthijs Kooijman [Tue, 14 Apr 2009 09:51:38 +0000 (11:51 +0200)]
Generate VHDL typecasts for literals when needed.

15 years agoPut mkConcSm inside the VHDLState monad.
Matthijs Kooijman [Tue, 14 Apr 2009 09:36:24 +0000 (11:36 +0200)]
Put mkConcSm inside the VHDLState monad.

This will allow us to acces the TypeMap for typed literals.

15 years agoAdd a Type to a Literal SignalExpr.
Matthijs Kooijman [Tue, 14 Apr 2009 09:24:34 +0000 (11:24 +0200)]
Add a Type to a Literal SignalExpr.

The Type is still unused, but will be used for making the VHDL backend add
a typecast (since the actual VHDL name for the type is not known
earlier).

15 years agoGeneralize VHDL type creation for SizedWord and FSVec.
Matthijs Kooijman [Thu, 9 Apr 2009 16:29:53 +0000 (18:29 +0200)]
Generalize VHDL type creation for SizedWord and FSVec.

15 years agoA word has a width, not a length.
Matthijs Kooijman [Thu, 9 Apr 2009 16:25:53 +0000 (18:25 +0200)]
A word has a width, not a length.

15 years agoProperly save state propagated flat functions.
Matthijs Kooijman [Thu, 9 Apr 2009 16:23:23 +0000 (18:23 +0200)]
Properly save state propagated flat functions.

Previously, the propagated state was not properly saved, resulting in
stateful functions being defined, while stateless versions were
instantiated.

15 years agoMake the Alu example use 4-bit SizedWord as data.
Matthijs Kooijman [Thu, 9 Apr 2009 16:21:39 +0000 (18:21 +0200)]
Make the Alu example use 4-bit SizedWord as data.

Since we have no operations on words yet, the alu itself is reduced to a
simple multiplexer for now.

15 years agoAdd (non-working) support for SizedWord literals.
Matthijs Kooijman [Thu, 9 Apr 2009 16:19:59 +0000 (18:19 +0200)]
Add (non-working) support for SizedWord literals.

The VHDL produced by this commit does not compile due to type
incompatibility, some thought is needed here.

15 years agoTranslate the SizedWord type to a VHDL vector.
Matthijs Kooijman [Thu, 9 Apr 2009 16:18:29 +0000 (18:18 +0200)]
Translate the SizedWord type to a VHDL vector.

15 years agoMove eval_type_level_int to CoreTools.
Matthijs Kooijman [Thu, 9 Apr 2009 16:17:01 +0000 (18:17 +0200)]
Move eval_type_level_int to CoreTools.

15 years agoImport the Types.Data.Num module in eval_tfp_int.
Matthijs Kooijman [Thu, 9 Apr 2009 16:16:32 +0000 (18:16 +0200)]
Import the Types.Data.Num module in eval_tfp_int.

This makes eval_tfp_int actually work, since now the proper instances are
in scope.

15 years agoAdd a [ModuleName] parameter to toCore.
Matthijs Kooijman [Thu, 9 Apr 2009 16:15:43 +0000 (18:15 +0200)]
Add a [ModuleName] parameter to toCore.

This allows callers to put any number of modules into scope before
translating to Core. Previously, functions and values could be
automatically imported by using their qualified name, but now also
instances can be used from modules that would not be imported otherwise.

15 years agoFix compilation of CoreTools.
Matthijs Kooijman [Thu, 9 Apr 2009 16:13:10 +0000 (18:13 +0200)]
Fix compilation of CoreTools.

15 years agoAdd an importModule function.
Matthijs Kooijman [Thu, 9 Apr 2009 16:06:47 +0000 (18:06 +0200)]
Add an importModule function.

This function allows us to import a module inside the TcRn monad and
properly handles (family) instances. This is needed for working with the
tfp package.

15 years agoAllow references to global values without arguments.
Matthijs Kooijman [Thu, 9 Apr 2009 16:03:13 +0000 (18:03 +0200)]
Allow references to global values without arguments.

These references are treated as function applications without arguments.

15 years agoMove some code out of the flattenExpr to global scope.
Matthijs Kooijman [Thu, 9 Apr 2009 16:02:00 +0000 (18:02 +0200)]
Move some code out of the flattenExpr to global scope.

15 years agoAdd sized_word_len, which gets the length from a SizedWord type.
Matthijs Kooijman [Thu, 9 Apr 2009 15:58:59 +0000 (17:58 +0200)]
Add sized_word_len, which gets the length from a SizedWord type.

15 years agoAdd the new CoreTools module.
Matthijs Kooijman [Thu, 9 Apr 2009 15:58:21 +0000 (17:58 +0200)]
Add the new CoreTools module.

This module will contain functions to work with specific constructs
represented as Core expressions and types (i.e., it knows about how
certain libraries are structured and uses functions from there).

For now, this contains a single function to translate (the Core
representation of) a type level int from the tfp package to a real Int.

15 years agoAdd a runTcM utility function.
Matthijs Kooijman [Thu, 9 Apr 2009 14:01:39 +0000 (16:01 +0200)]
Add a runTcM utility function.

15 years agoDerive Show for HsBinds.
Matthijs Kooijman [Thu, 9 Apr 2009 14:01:14 +0000 (16:01 +0200)]
Derive Show for HsBinds.

15 years agoUse basic identifiers for builtins.
Matthijs Kooijman [Mon, 6 Apr 2009 13:58:15 +0000 (15:58 +0200)]
Use basic identifiers for builtins.

15 years agoMake Map.Map an instance of Pretty.
Matthijs Kooijman [Mon, 6 Apr 2009 13:49:10 +0000 (15:49 +0200)]
Make Map.Map an instance of Pretty.

15 years agoUse extended VHDL identifiers where possible.
Matthijs Kooijman [Mon, 6 Apr 2009 13:39:30 +0000 (15:39 +0200)]
Use extended VHDL identifiers where possible.

Extended VHDL identifiers support a lot more differen characters, so can
preserve the source identifiers a lot better.

15 years agoUse the actual FSVec length to create VHDL vectors.
Matthijs Kooijman [Mon, 6 Apr 2009 12:00:20 +0000 (14:00 +0200)]
Use the actual FSVec length to create VHDL vectors.

15 years agoIgnore .swp files.
Matthijs Kooijman [Mon, 6 Apr 2009 11:58:37 +0000 (13:58 +0200)]
Ignore .swp files.

15 years agoAdd the new HsTools module.
Matthijs Kooijman [Mon, 6 Apr 2009 11:54:00 +0000 (13:54 +0200)]
Add the new HsTools module.

This module provides a number of functions to work with HsExprs, CoreExprs
and various types.

15 years agoAdd the new GhcTools module.
Matthijs Kooijman [Mon, 6 Apr 2009 11:48:31 +0000 (13:48 +0200)]
Add the new GhcTools module.

This module provides a number of functions to work with GHC and the Ghc
monad.

15 years agoCleanup imports and add a vim modeline.
Matthijs Kooijman [Mon, 6 Apr 2009 11:42:19 +0000 (13:42 +0200)]
Cleanup imports and add a vim modeline.

15 years agoMake listBind also show the type of the bind.
Matthijs Kooijman [Mon, 6 Apr 2009 11:40:48 +0000 (13:40 +0200)]
Make listBind also show the type of the bind.

15 years agoDerive Show for more types.
Matthijs Kooijman [Mon, 6 Apr 2009 11:39:50 +0000 (13:39 +0200)]
Derive Show for more types.

In particular, this derives Show for all Outputable types, which requires
some ugly language pragma's (UndecidableTypes...). However, now HsExpr as
well as Type should be decently showable.

15 years agoDelete unused Parser.hs.
Matthijs Kooijman [Thu, 2 Apr 2009 15:33:16 +0000 (17:33 +0200)]
Delete unused Parser.hs.

15 years agoAdd a TODO.
Matthijs Kooijman [Tue, 10 Mar 2009 16:58:07 +0000 (17:58 +0100)]
Add a TODO.

15 years agoRemove a few stale TODOs.
Matthijs Kooijman [Tue, 10 Mar 2009 16:56:50 +0000 (17:56 +0100)]
Remove a few stale TODOs.

15 years agoImport the ieee library into the generated types package.
Matthijs Kooijman [Tue, 10 Mar 2009 16:55:29 +0000 (17:55 +0100)]
Import the ieee library into the generated types package.

15 years agoFilter out dots from generated type id's.
Matthijs Kooijman [Tue, 10 Mar 2009 16:50:45 +0000 (17:50 +0100)]
Filter out dots from generated type id's.

15 years agoPut vhdl_ty in the (new) TypeState Monad.
Matthijs Kooijman [Tue, 10 Mar 2009 16:48:45 +0000 (17:48 +0100)]
Put vhdl_ty in the (new) TypeState Monad.

This ensures that vhdl_ty can create new types when needed.

15 years agoOutput a package containing all type declarations.
Matthijs Kooijman [Tue, 10 Mar 2009 15:22:36 +0000 (16:22 +0100)]
Output a package containing all type declarations.

Since there is nothing that registers new types yet, this outputs just an
empty session for now.

15 years agoAdd support for builtin functions again.
Matthijs Kooijman [Tue, 10 Mar 2009 15:00:55 +0000 (16:00 +0100)]
Add support for builtin functions again.

15 years agoRedo the global (state) structure of the translator.
Matthijs Kooijman [Tue, 10 Mar 2009 14:42:38 +0000 (15:42 +0100)]
Redo the global (state) structure of the translator.

This gives the VHDL module its own state and moves the Entity for each
function into that state. The AST.EntityDec and AST.ArchBody are no longer
stored in the state, but simply returned directly.

The State class used is changed from the one from the mtl library to the
one from the transformers library, since that one integrates nicely with
the data-accessors library. This integration (together with the
simplification of the states) pretty much removes the need for all
manually defined accessor function.

This change breaks support for builtin functions (hwxor, hwnot, etc.),
which will be fixed in a subsequent commit. Also, custom types are not
longer output right now, but there is infrastructure in place to do better
type collection.

15 years agoRename VHDLState to TranslatorState.
Matthijs Kooijman [Mon, 9 Mar 2009 16:02:06 +0000 (17:02 +0100)]
Rename VHDLState to TranslatorState.

15 years agoUse Data.Accessor for FuncData.
Matthijs Kooijman [Mon, 9 Mar 2009 15:20:05 +0000 (16:20 +0100)]
Use Data.Accessor for FuncData.

Data.Accessor allows for (automatically) defining accessor functions for
reading and writing record fields. This is a field test to see if it's
useful.

15 years agoRemove createArchitecture from the VHDLState Monad.
Matthijs Kooijman [Mon, 9 Mar 2009 09:47:46 +0000 (10:47 +0100)]
Remove createArchitecture from the VHDLState Monad.

15 years agoRemove mkConcSm from the VHDLState monad.
Matthijs Kooijman [Mon, 9 Mar 2009 09:28:41 +0000 (10:28 +0100)]
Remove mkConcSm from the VHDLState monad.

15 years agoRemove nameFlatFunction from the VHDLState monad.
Matthijs Kooijman [Mon, 9 Mar 2009 09:28:24 +0000 (10:28 +0100)]
Remove nameFlatFunction from the VHDLState monad.

15 years agoMake createEntity preserve the Entity on builtin functions.
Matthijs Kooijman [Mon, 9 Mar 2009 09:26:42 +0000 (10:26 +0100)]
Make createEntity preserve the Entity on builtin functions.

15 years agoAdd a getFuncMap accessor for VHDLState.
Matthijs Kooijman [Fri, 6 Mar 2009 10:23:00 +0000 (11:23 +0100)]
Add a getFuncMap accessor for VHDLState.

15 years agoDerive Show for a bunch of types.
Matthijs Kooijman [Fri, 6 Mar 2009 10:22:47 +0000 (11:22 +0100)]
Derive Show for a bunch of types.

15 years agoMove the Show deriving for Core types to a new CoreShow module.
Matthijs Kooijman [Fri, 6 Mar 2009 10:21:55 +0000 (11:21 +0100)]
Move the Show deriving for Core types to a new CoreShow module.

15 years agoRemove the dontcare function from Bits.
Matthijs Kooijman [Thu, 5 Mar 2009 13:43:24 +0000 (14:43 +0100)]
Remove the dontcare function from Bits.

15 years agoRemove createEntity from the VHDLState monad.
Matthijs Kooijman [Thu, 5 Mar 2009 13:36:36 +0000 (14:36 +0100)]
Remove createEntity from the VHDLState monad.

15 years agoRemove getDesignFiles from the VHDLState monad.
Matthijs Kooijman [Thu, 5 Mar 2009 12:09:01 +0000 (13:09 +0100)]
Remove getDesignFiles from the VHDLState monad.

This also does some related cleanup.

15 years agoStrip adjacent underscores from VHDLIds.
Matthijs Kooijman [Thu, 5 Mar 2009 11:59:34 +0000 (12:59 +0100)]
Strip adjacent underscores from VHDLIds.

15 years agoProvide preliminary support for list types.
Matthijs Kooijman [Wed, 4 Mar 2009 21:11:36 +0000 (22:11 +0100)]
Provide preliminary support for list types.

Lot's of TODO's are left...

15 years agoAdd some hardware models using vectors (FSVec).
Matthijs Kooijman [Wed, 4 Mar 2009 21:10:58 +0000 (22:10 +0100)]
Add some hardware models using vectors (FSVec).

15 years agoFix propagateState removing all non-FApp SigDefs.
Matthijs Kooijman [Wed, 4 Mar 2009 10:35:42 +0000 (11:35 +0100)]
Fix propagateState removing all non-FApp SigDefs.

15 years agoMap the clk port on stateful function applications.
Matthijs Kooijman [Wed, 4 Mar 2009 10:35:08 +0000 (11:35 +0100)]
Map the clk port on stateful function applications.

15 years agoDon't inline alu.
Matthijs Kooijman [Wed, 4 Mar 2009 10:34:25 +0000 (11:34 +0100)]
Don't inline alu.

15 years agoRemove support for DontCare.
Matthijs Kooijman [Tue, 3 Mar 2009 23:54:09 +0000 (00:54 +0100)]
Remove support for DontCare.

15 years agoFill in propagateState.
Matthijs Kooijman [Tue, 3 Mar 2009 23:50:27 +0000 (00:50 +0100)]
Fill in propagateState.

15 years agoRemove the now obsolete getOwnStates.
Matthijs Kooijman [Tue, 3 Mar 2009 23:50:09 +0000 (00:50 +0100)]
Remove the now obsolete getOwnStates.

15 years agoAdd some predicates and accessors to FlattenTypes.
Matthijs Kooijman [Tue, 3 Mar 2009 23:49:43 +0000 (00:49 +0100)]
Add some predicates and accessors to FlattenTypes.

15 years agoLet VHDL use SignalInfo instead of HsFunction for generating states.
Matthijs Kooijman [Tue, 3 Mar 2009 23:34:40 +0000 (00:34 +0100)]
Let VHDL use SignalInfo instead of HsFunction for generating states.

This makes sure that any signals that will be marked SigSubState
won't get an extra state variable.

15 years agoAdd initial (dummy) propagateState function.
Matthijs Kooijman [Tue, 3 Mar 2009 11:24:57 +0000 (12:24 +0100)]
Add initial (dummy) propagateState function.

The propagateState function will propagate the state variables down to
called functions whenever possible. For now, it just leaves functions
unchanged.

15 years agoAdd vim modeline.
Matthijs Kooijman [Tue, 3 Mar 2009 11:21:57 +0000 (12:21 +0100)]
Add vim modeline.

15 years agoAdd a is_FApp predicate.
Matthijs Kooijman [Tue, 3 Mar 2009 11:21:35 +0000 (12:21 +0100)]
Add a is_FApp predicate.

15 years agoNever inline the half_adder function.
Matthijs Kooijman [Tue, 3 Mar 2009 10:58:25 +0000 (11:58 +0100)]
Never inline the half_adder function.

15 years agoAdd StandalonDeriving language option to Pretty.
Matthijs Kooijman [Tue, 3 Mar 2009 10:56:34 +0000 (11:56 +0100)]
Add StandalonDeriving language option to Pretty.

15 years agoDon't add duplicate name hints.
Matthijs Kooijman [Tue, 3 Mar 2009 10:56:05 +0000 (11:56 +0100)]
Don't add duplicate name hints.

15 years agoPut VHDL files for each design in a separate directory.
Matthijs Kooijman [Tue, 3 Mar 2009 09:22:04 +0000 (10:22 +0100)]
Put VHDL files for each design in a separate directory.

15 years agoAllow for generating VHDL for stateless functions.
Matthijs Kooijman [Tue, 3 Mar 2009 08:59:45 +0000 (09:59 +0100)]
Allow for generating VHDL for stateless functions.

Previously, the top level function needed to be stateful always. Now, the
makeVHDL function has a Bool argument to specify statefulness.

15 years agoAdd some newlines in the output.
Matthijs Kooijman [Fri, 27 Feb 2009 15:24:57 +0000 (16:24 +0100)]
Add some newlines in the output.

15 years agoMake exec have a single binding.
Matthijs Kooijman [Fri, 27 Feb 2009 13:37:55 +0000 (14:37 +0100)]
Make exec have a single binding.

This prevents two separate invocations of register_bank, which leads to
having a separate register bank for reading and writing.

15 years agoAdd a two-port mux hardware model.
Matthijs Kooijman [Fri, 27 Feb 2009 13:35:05 +0000 (14:35 +0100)]
Add a two-port mux hardware model.

15 years agoWrite each VHDL entity to a seperate file.
Matthijs Kooijman [Thu, 19 Feb 2009 15:15:16 +0000 (16:15 +0100)]
Write each VHDL entity to a seperate file.

15 years agoLet the exec function output something.
Matthijs Kooijman [Thu, 19 Feb 2009 15:14:52 +0000 (16:14 +0100)]
Let the exec function output something.

15 years agoSupport construction of empty tuples.
Matthijs Kooijman [Thu, 19 Feb 2009 14:48:58 +0000 (15:48 +0100)]
Support construction of empty tuples.

15 years agoPrint the list of signals sorted by id.
Matthijs Kooijman [Thu, 19 Feb 2009 14:31:14 +0000 (15:31 +0100)]
Print the list of signals sorted by id.

15 years agoAlso allow uppercase letters and a period in VHDL ids.
Matthijs Kooijman [Thu, 19 Feb 2009 14:13:45 +0000 (15:13 +0100)]
Also allow uppercase letters and a period in VHDL ids.

15 years agoAdd name hints to various signals generated.
Matthijs Kooijman [Thu, 19 Feb 2009 14:08:50 +0000 (15:08 +0100)]
Add name hints to various signals generated.

15 years agoStrip invalid characters from VHDL identifiers.
Matthijs Kooijman [Thu, 19 Feb 2009 14:06:02 +0000 (15:06 +0100)]
Strip invalid characters from VHDL identifiers.