Fixed VHDL Type generation, vhdlTy now uses HType's to generate VHDL Types. Logic...
authorChristiaan Baaij <christiaan.baaij@gmail.com>
Tue, 10 Nov 2009 13:49:47 +0000 (14:49 +0100)
committerChristiaan Baaij <christiaan.baaij@gmail.com>
Tue, 10 Nov 2009 13:49:47 +0000 (14:49 +0100)
commit466f80bdde9511508c38e951d208a2a52c90c7da
tree2ae713e149d35cff8820d7e116438f3e88d0ec3c
parenta54863feb7304aa6a843efc15d29f017c45407f4
Fixed VHDL Type generation, vhdlTy now uses HType's to generate VHDL Types. Logic from vhdlTy moved to mkHType
cλash/CLasH/Translator.hs
cλash/CLasH/Translator/TranslatorTypes.hs
cλash/CLasH/Utils/GhcTools.hs
cλash/CLasH/VHDL.hs
cλash/CLasH/VHDL/Generate.hs
cλash/CLasH/VHDL/VHDLTools.hs
reducer.hs