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(parent: f445c30) | patch
Make register_bank work, with a bunch of changes.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Thu, 19 Feb 2009 12:14:13 +0000 (13:14 +0100)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Thu, 19 Feb 2009 12:14:13 +0000 (13:14 +0100)
commit14367b6b9fd0770a78e02fad425daa369df4bec6
tree10034c4d5ae09a7a6d692b38016b3e1cc9fc4a0btree | snapshot
parentf445c30c4a089e8898fd1438747b3c7e33547890commit | diff
Make register_bank work, with a bunch of changes.

Add special casing for the "fst", "snd", "patError" and "==" functions.

Add literal and equality tests to the SignalExpr type.

Allow data constructors to be used in expression, when they have a
corresponding literal in VHDL.

Allow full expressions to be scrutinized instead of just variables.

Perhaps more...
Flatten.hs diff | blob | history
FlattenTypes.hs diff | blob | history
Pretty.hs diff | blob | history
Translator.hs diff | blob | history
VHDL.hs diff | blob | history
The Cλash compiler