Add examples of various problems mentioned.

[matthijs/projects/internship.git] / Report / Main / Problems / Challenges.tex

diff --git a/Report/Main/Problems/Challenges.tex b/Report/Main/Problems/Challenges.tex
index b5d5f8e7aac725f05c35b4c31a779577d336c3cc..d5bc0145919f7f1d4f3de0b8a2159587d8259f7c 100644 (file)
--- a/Report/Main/Problems/Challenges.tex
+++ b/Report/Main/Problems/Challenges.tex
@@ -83,7 +83,8 @@ anything is mappable, but with a simple compiler this will not result in the
 most efficient code. In the Montium case, a lot of things simply cannot be
 mapped on the hardware at all.
 
-Considering that our ideal is not reachable (by far), every feature
+Considering that our ideal is not reachable (Though the new hardware might take
+us a lot closer), every feature
 considered for MontiumC was evaluated thoroughly for feasibility, both in hardware
 and in the compiler. In practice, this meant that new language features would be
 informally expressed and discussed, and only added to the specification after
@@ -109,6 +110,20 @@ cannot all be mapped onto normal C operators. By using a specific
 function call for each, we can still distinguish between all the
 different operations and add extra arguments where needed.
 
+\subsubsection{What do we have now?}
+The result of this work is a usable, but conservative, specification. It
+defines the subset of features that should certainly be supported. In practice,
+some other features will also work, but not reliably. Therefore, these are left
+out of the specification.
+
+It is not unlikely that the specification is still incorrect in a few places (or
+rather, that the code does not implement the specification properly). Since
+so far there has been not any automated checking of programs against the
+specification, these errors have not been uncovered. Once the new hardware is
+more clearly defined and the MontiumC specification is updated for it, this
+checking should be added so the specification and compiler can be better
+matched.
+
 \begin{figure}
        \caption{Low level MontiumC example}
 \label{ExampleLow}
@@ -243,12 +258,32 @@ architectures) resulting in miscompiled or uncompilable code.
 
 In some cases, these extra constraints can be formulated in a generic way, such
 that the LLVM code can handle architectures with or without the constraint.
+Examples include providing Montium specific parameters through LLVM's 
+``\verb TargetData '' class and modifications to the loop unroller to support
+custom policies.
+
 In a lot of cases, however, the constraint is so Montium specific that changing
-LLVM to support it is not feasible. In a few cases, this meant that the backend
-was changed to support more features of the LLVM IR. In other cases, a
-Recore-specific transformations was added to solve these problems. In a few more
-cases, the problems are still unresolved, effectively resulting in additional
-constraints on the MontiumC language.
+LLVM to support it is not feasible.
+
+In a few of these cases, this meant that the backend was changed to support more
+features of the LLVM IR. An example of this is finding datapath constants (which
+are the result of a function in MontiumC, so hard to track by LLVM).
+
+In other cases, Recore-specific transformations were added to solve these
+problems. Examples of these are a transformation that removes all global
+variables and passes them as arguments and return values instead, a
+transformation that forcibly inlines all functions marked as ``\verb inline ''
+and a transformation that limits variable lifetimes by introducing extra phi
+nodes.
+
+In a few more cases, the problems are still unresolved, effectively resulting in
+additional constraints on the MontiumC language. Examples of these are
+preventing instructions from being moved out of if/else blocks (which is
+perfectly fine from an LLVM IR standpoint, but does not take into account the
+extra meaning that an if statement has in MontiumIR) and removal of unused bits
+from a constant (which could introduce more different constants than the Montium
+has registers for them).
+
 
 \subsection{New hardware design}
 \label{Pipelining}