+
+\subsection{Pipelined scheduling}
+I've also been involved for a bit with the instruction scheduling algorithm
+required for the new (pipelined) hardware design. Even though this is completely
+outside of the area of my assignment, the initial prototype of that scheduler
+was created using LLVM by someone else, so I have been assisting him with that.
+Initially mostly helping out with hints on LLVM coding, but later also
+with thinking about the scheduler and hardware design.
+
+I will not go into much detail about the new hardware and its scheduler here,
+but I will highlight the most important challenges and tradeoffs.