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Put a VHDL in smallcaps.
[matthijs/master-project/report.git]
/
Chapters
/
Prototype.tex
diff --git
a/Chapters/Prototype.tex
b/Chapters/Prototype.tex
index d1862475688e1df1ad39876cd70b7c874862a805..6db0d8632e089e810e5735c09b00ee068a1391cc 100644
(file)
--- a/
Chapters/Prototype.tex
+++ b/
Chapters/Prototype.tex
@@
-939,3
+939,5
@@
checking usage constraints on state variables.
\todo{Implementation issues: Separate compilation, simplified core.}
+
+% vim: set sw=2 sts=2 expandtab: