+language embedded in Haskell, but to use (a subset of) the Haskell language
+itself for the purpose of describing hardware. By taking this approach, we can
+capture certain language constructs, such as Haskell's choice elements
+(if-constructs, case-constructs, pattern matching, etc.), which are not
+available in the functional hardware description languages that are embedded
+in Haskell as a domain specific languages. As far as the authors know, such
+extensive support for choice-elements is new in the domain of functional
+hardware description language. As the hardware descriptions are plain Haskell
+functions, these descriptions can be compiled for simulation using using the
+optimizing Haskell compiler \GHC.
+
+Where descriptions in a conventional hardware description language have an
+explicit clock for the purpose state and synchronicity, the clock is implied
+in this research. The functions describe the behavior of the hardware between
+clock cycles, as such, only synchronous systems can be described. Many
+functional hardware description models signals as a stream of all values over
+time; state is then modeled as a delay on this stream of values. The approach
+taken in this research is to make the current state of the circuit part of the
+input of the function and the updated state part of the output of a function.
+
+Like the standard hardware description languages, descriptions made in a
+functional hardware description language must eventually be converted into a
+netlist. This research also features a prototype translator called \CLaSH\
+(pronounced: clash), which converts the Haskell code to equivalently behaving
+synthesizable \VHDL\ code, ready to be converted to an actual netlist format
+by optimizing \VHDL\ synthesis tools.