2 Other FHDLs (short, Christiaan has details)
4 Advantages of clash / why clash?
6 VHDL / Verilog / EDIF etc. Why VHDL?
10 Simple function -> component interpretation (Model: Structure)
12 Explicit vs implicit passing of state (e.g, delay)
13 Explicit vs implicit marking
14 Interpret: Polymorphism
15 Interpret: Higher order
17 Impossible things: Infinite recursion, higher order expressions,
22 Core - description of the language (appendix?)
23 Stages (-> Core, Normalization, -> VHDL)
26 Haskell language coverage / constraints
29 Custom types (Sum types, product types)
30 Function types / higher order expressions
35 Completeness / conditions on input
37 Casts / Strictness / Casebinders not fully supported
40 Boilerplate reduction (State distribution & pipelining)
42 Multiple time domains (Events) -- Also, clock line optimization /
44 Multiple cycle descriptions