Vertically center the register output port.
authorMatthijs Kooijman <matthijs@stdin.nl>
Mon, 5 Oct 2009 12:15:42 +0000 (14:15 +0200)
committerMatthijs Kooijman <matthijs@stdin.nl>
Mon, 5 Oct 2009 12:15:42 +0000 (14:15 +0200)

No differences found