- VHDL level by existing tools. These tools have years of experience in this
- field, so it would not be reasonable to assume we could achieve a similar
- amount of optimization in our prototype (nor should it be a goal,
- considering this is just a prototype).
+ VHDL level by existing tools. These tools have been under
+ development for years, so it would not be reasonable to assume we
+ could achieve a similar amount of optimization in our prototype (nor
+ should it be a goal, considering this is just a prototype).
+
+ \placeintermezzo{}{
+ \startframedtext[width=8cm,background=box,frame=no]
+ \startalignment[center]
+ {\tfa Translation vs. compilation vs. synthesis}
+ \stopalignment
+ \blank[medium]
+ In this thesis the words \emph{translation}, \emph{compilation} and
+ sometimes \emph{synthesis} will be used interchangedly to refer to the
+ process of translating the hardware description from the Haskell
+ language to the \VHDL\ language.
+
+ Similarly, the prototype created is referred to as both the
+ \emph{translator} as well as the \emph{compiler}.
+
+ The final part of this process is usually referred to as \emph{\VHDL\
+ generation}.
+ \stopframedtext
+ }