Add TODO.

[matthijs/master-project/report.git] / Chapters / Normalization.tex

diff --git a/Chapters/Normalization.tex b/Chapters/Normalization.tex
index 89c2d4a13faafd1ac6df231082632d1d78777148..593a5f0f89f66814c2be5669a098aa31c014a3ef 100644 (file)
--- a/Chapters/Normalization.tex
+++ b/Chapters/Normalization.tex
@@ -7,9 +7,9 @@
   % space at the start of the frame.
   \define[1]\example{
     \framed[offset=1mm,align=right,strut=no,background=box,frame=off]{
   % space at the start of the frame.
   \define[1]\example{
     \framed[offset=1mm,align=right,strut=no,background=box,frame=off]{

-      \setuptyping[option=LAM,style=sans,before=,after=]
+      \setuptyping[option=LAM,style=sans,before=,after=,strip=auto]

       \typebuffer[#1]
       \typebuffer[#1]

-      \setuptyping[option=none,style=\tttf]
+      \setuptyping[option=none,style=\tttf,strip=auto]

     }
   }
 
     }
   }
 


@@ -862,6 +862,8 @@
         Since its exact role and need is not clear yet, this transformation is
         not yet specified.
 
         Since its exact role and need is not clear yet, this transformation is
         not yet specified.
 

+        TODO: Cast propagation
+

       \subsubsection{Top level binding inlining}
         This transform takes simple top level bindings generated by the
         \small{GHC} compiler. \small{GHC} sometimes generates very simple
       \subsubsection{Top level binding inlining}
         This transform takes simple top level bindings generated by the
         \small{GHC} compiler. \small{GHC} sometimes generates very simple


@@ -901,11 +903,11 @@
         architecture which would just add its inputs. This generates a lot of
         overhead in the VHDL, which is particularly annoying when browsing the
         generated RTL schematic (especially since + is not allowed in VHDL
         architecture which would just add its inputs. This generates a lot of
         overhead in the VHDL, which is particularly annoying when browsing the
         generated RTL schematic (especially since + is not allowed in VHDL

-        architecture names\footnote{Technically, it is allowed when using
-        extended identifiers, but it seems that none of the tooling likes
-        extended identifiers in filenames, so it effectively doesn't work}, so
-        the entity would be called \quote{w7aA7f} or something similarly
-        unreadable and autogenerated).
+        architecture names\footnote{Technically, it is allowed to use
+        non-alphanumerics when using extended identifiers, but it seems that
+        none of the tooling likes extended identifiers in filenames, so it
+        effectively doesn't work}, so the entity would be called
+        \quote{w7aA7f} or something similarly unreadable and autogenerated).

 
     \subsection{Program structure}
       These transformations are aimed at normalizing the overall structure
 
     \subsection{Program structure}
       These transformations are aimed at normalizing the overall structure


@@ -950,7 +952,7 @@
 
         \starttrans
         (letrec binds in E) M
 
         \starttrans
         (letrec binds in E) M

-        -----------------
+        ------------------------

         letrec binds in E M
         \stoptrans
 
         letrec binds in E M
         \stoptrans