- The first step in the core to \small{VHDL} translation process, is normalization. We
- aim to bring the core description into a simpler form, which we can
+ The first step in the Core to \small{VHDL} translation process, is normalization. We
+ aim to bring the Core description into a simpler form, which we can
Now we have some intuition for the normal form, we can describe how we want
the normal form to look like in a slightly more formal manner. The
EBNF-like description in \in{definition}[def:IntendedNormal] captures
Now we have some intuition for the normal form, we can describe how we want
the normal form to look like in a slightly more formal manner. The
EBNF-like description in \in{definition}[def:IntendedNormal] captures
\subsection[sec:normalization:uniq]{Binder uniqueness}
A common problem in transformation systems, is binder uniqueness. When not
considering this problem, it is easy to create transformations that mix up
\subsection[sec:normalization:uniq]{Binder uniqueness}
A common problem in transformation systems, is binder uniqueness. When not
considering this problem, it is easy to create transformations that mix up
function type. Since these can be any expression, there is no
transformation needed. Note that this category is exactly all
expressions that are not transformed by the transformations for the
function type. Since these can be any expression, there is no
transformation needed. Note that this category is exactly all
expressions that are not transformed by the transformations for the
that is used as an argument to a built-in function will be either
transformed into one of the above categories, or end up in this
categorie. In any case, the result is in normal form.
that is used as an argument to a built-in function will be either
transformed into one of the above categories, or end up in this
categorie. In any case, the result is in normal form.
there are probably expressions involving cast expressions that cannot
be brought into intended normal form by this transformation system.
there are probably expressions involving cast expressions that cannot
be brought into intended normal form by this transformation system.
our compilation to \VHDL. The main difference seems to be that in
hardware every expression is always evaluated, while in software
it is only evaluated if needed, but it should be possible to
our compilation to \VHDL. The main difference seems to be that in
hardware every expression is always evaluated, while in software
it is only evaluated if needed, but it should be possible to
Since each of the transformations can be applied to any
subexpression as well, there is a constraint on our meaning
Since each of the transformations can be applied to any
subexpression as well, there is a constraint on our meaning
By systematically reviewing the entire Core language definition
along with the intended normal form definition (both of which have
a similar structure), it should be possible to identify all
By systematically reviewing the entire Core language definition
along with the intended normal form definition (both of which have
a similar structure), it should be possible to identify all
normal form and identify a transformation that applies to it.
This approach is especially useful for proving completeness of our
normal form and identify a transformation that applies to it.
This approach is especially useful for proving completeness of our