mapped to a signal, which is used as the result of the application.
Since every top level function generates its own component, the
- hierarchy of of function calls is reflected in the final \VHDL output
- as well, creating a hierarchical \VHDL description of the hardware.
- This separation in different components makes the resulting \VHDL
+ hierarchy of of function calls is reflected in the final \VHDL\ output
+ as well, creating a hierarchical \VHDL\ description of the hardware.
+ This separation in different components makes the resulting \VHDL\
output easier to read and debug.
\in{Example}[ex:And3] shows a simple program using only function
the comparator and directly feed 'in' into the multiplexer (or even use an
inverter instead of a multiplexer). However, we will try to make a
general translation, which works for all possible \hs{case} expressions.
- Optimizations such as these are left for the \VHDL synthesizer, which
+ Optimizations such as these are left for the \VHDL\ synthesizer, which
handles them very well.
\todo{Be more explicit about >2 alternatives}
\subsection{User-defined types}
There are three ways to define new types in Haskell: Algebraic
datatypes with the \hs{data} keyword, type synonyms with the \hs{type}
- keyword and type renamings with the \hs{newtype} keyword. \GHC
+ keyword and type renamings with the \hs{newtype} keyword. \GHC\
offers a few more advanced ways to introduce types (type families,
existential typing, \small{GADT}s, etc.) which are not standard
Haskell. These will be left outside the scope of this research.
Only an algebraic datatype declaration actually introduces a
- completely new type, for which we provide the \VHDL translation
+ completely new type, for which we provide the \VHDL\ translation
below. Type synonyms and renamings only define new names for
existing types (where synonyms are completely interchangeable and
renamings need explicit conversion). Therefore, these do not need
- any particular \VHDL translation, a synonym or renamed type will
+ any particular \VHDL\ translation, a synonym or renamed type will
just use the same representation as the original type. The
distinction between a renaming and a synonym does no longer matter
in hardware and can be disregarded in the generated \VHDL.
to this type. The collection for a product type is the Cartesian
product of the collections for the types of its fields.
- These types are translated to \VHDL record types, with one field for
+ These types are translated to \VHDL\ record types, with one field for
every field in the constructor. This translation applies to all single
constructor algebraic datatypes, including those with just one
field (which are technically not a product, but generate a VHDL
Note that Haskell's \hs{Bool} type is also defined as an
enumeration type, but we have a fixed translation for that.
- These types are translated to \VHDL enumerations, with one value for
+ These types are translated to \VHDL\ enumerations, with one value for
each constructor. This allows references to these constructors to be
translated to the corresponding enumeration value.
\stopdesc
union of the the collections for each of the constructors.
Sum types are currently not supported by the prototype, since there is
- no obvious \VHDL alternative. They can easily be emulated, however, as
+ no obvious \VHDL\ alternative. They can easily be emulated, however, as
we will see from an example:
\starthaskell
last one if \hs{B}), all the other ones have no useful value.
An obvious problem with this naive approach is the space usage: The
- example above generates a fairly big \VHDL type. Since we can be
+ example above generates a fairly big \VHDL\ type. Since we can be
sure that the two \hs{Word}s in the \hs{Sum} type will never be valid
at the same time, this is a waste of space.
If the naive approach for sum types described above would be used,
a record would be created where the first field is an enumeration
to distinguish \hs{Empty} from \hs{Cons}. Furthermore, two more
- fields would be added: One with the (\VHDL equivalent of) type
+ fields would be added: One with the (\VHDL\ equivalent of) type
\hs{t} (assuming this type is actually known at compile time, this
should not be a problem) and a second one with type \hs{List t}.
The latter one is of course a problem: This is exactly the type
that was to be translated in the first place.
- The resulting \VHDL type will thus become infinitely deep. In
+ The resulting \VHDL\ type will thus become infinitely deep. In
other words, there is no way to statically determine how long
(deep) the list will be (it could even be infinite).
Fortunately, we can again use the principle of specialization: Since every
function application generates a separate piece of hardware, we can know
the types of all arguments exactly. Provided that existential typing
- (which is a \GHC extension) is not used typing, all of the
+ (which is a \GHC\ extension) is not used typing, all of the
polymorphic types in a function must depend on the types of the
arguments (In other words, the only way to introduce a type variable
is in a lambda abstraction).
result is stateful. This means that the annotation lives
\quote{outside} of the function, it is completely invisible when
looking at the function body.
- \item Use some kind of annotation on the type level, \ie give stateful
+ \item Use some kind of annotation on the type level, \ie\ give stateful
arguments and stateful (parts of) results a different type. This has the
potential to make this annotation visible inside the function as well,
such that when looking at a value inside the function body you can
(evaluation of constant comparisons), to ensure non-termination.
Supporting general recursion will probably require strict conditions
on the input descriptions. Even then, it will be hard (if not
- impossible) to really guarantee termination, since the user (or \GHC
+ impossible) to really guarantee termination, since the user (or \GHC\
desugarer) might use some obscure notation that results in a corner
case of the simplifier that is not caught and thus non-termination.