Merge branch 'haskel09talk' of http://git.stderr.nl/matthijs/projects/master-project

[matthijs/master-project/haskell-symposium-talk.git] / reducer.lhs

diff --git a/reducer.lhs b/reducer.lhs
index cf97b3fe7cd104d0e9c2a71ed955e0c1a3d6f55f..4d74c68ed188bc00b66f31730421be46ba86a204 100644 (file)
--- a/reducer.lhs
+++ b/reducer.lhs
@@ -2,15 +2,22 @@
 \frame{
 \frametitle{More than just toys}
 \pause
+TODO: Plaatje van de reducer
 \begin{itemize}
-  \item We designed a matrix reduction circuit\pause
-  \item Simulation results in Haskell match VHDL simulation results
-  \item Synthesis completes without errors or warnings
-  \item It runs at half the speed of a hand-coded VHDL design
+  \item We implemented a reduction circuit in \clash{}\pause
+  \item Simulation results in Haskell match VHDL simulation results\pause
+  \item Synthesis completes without errors or warnings\pause
+  \item Around half speed of handcoded and optimized VHDL \pause
 \end{itemize}
 }\note[itemize]{
 \item Toys like the poly cpu one are good to give a quick demo
 \item But we used \clash{} to design 'real' hardware
 \item Reduction circuit sums the numbers in a row of a (sparse) matrix
-\item Half speed is nice, considering we don't optimize for speed
-}
\ No newline at end of file
+\item Nice speed considering we don't optimize for it (only single example!)
+}
+
+\begin{frame}[plain] 
+   \begin{centering} 
+      \includegraphics[height=\paperheight]{reducerschematic.png} 
+      \end{centering} 
+\end{frame}