Add rest of my presentation

[matthijs/master-project/final-presentation.git] / christiaan / reductioncircuit.lhs

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+\section{Restrictions}
+%include talk.fmt
+\frame{
+\frametitle{Too Restrictive?}
+\begin{itemize}
+  \item Is CλasH too restrictive given the fact that a designer can currently not define his own vector transformations, or recursive functions for that matter?
+\end{itemize}
+}
+
+\frame{
+\frametitle{Too Restrictive?}
+\begin{itemize}
+  \item There is certainly room to increase expressivity. But we can already describe non-trivial design in CλasH.
+  \item Example: Reduction circuit
+\end{itemize}
+}
+
+\section{Reduction circuit}
+
+\frame{
+\frametitle{Reduction Circuit}
+\begin{columns}[l]
+\column{0.5\textwidth}
+\begin{figure}
+\includegraphics[height=6.5cm]{reducer}
+\end{figure}
+\column{0.5\textwidth}
+\begin{itemize}
+  \item Reduction circuit sums the floating-point values of each row in a matrix.
+  \item Non-trivial due to pipe-lined floating-point adder.
+  \item Largest restrictions are the fixed-size vectors.
+\end{itemize}
+\end{columns}
+}
+
+\begin{frame}
+   \begin{figure} 
+      \includegraphics[height=9cm]{reducerschematic} 
+    \end{figure}
+\end{frame}
+
+
+\begin{frame}
+\frametitle{FIFO Buffer}
+\begin{itemize}
+  \item Wish:
+\begin{verbatim} 
+fifo :: (State mem) (input, shift) = 
+  (State mem', out1, out2)
+  where
+    out1 | length mem == 0 = NotValid
+         | otherwise       = head mem
+    out2 | length mem < 2  = NotValid
+         | otherwise       = head (tail mem)
+    mem' = drop shift mem ++ [input]
+\end{verbatim}
+\end{itemize}
+\end{frame}
+
+\begin{frame}
+\frametitle{FIFO Buffer}
+\begin{itemize}
+  \item Reality:
+\begin{verbatim} 
+fifo :: (State (Fifo {..})) (inp, shift) = 
+  ( State (Fifo { mem = mem'
+                , ptr = ptr'     
+                })
+  , out1, out2
+  )
+  where
+    ptr'  = ptr - shift + 1
+    mem'' = replace mem ptr (Valid inp)
+    mem'  | shift == 0 = mem''
+          | shift == 1 = (tail mem'') <+ NotValid
+          | otherwise  = ((tail (tail mem'') 
+                          <+ NotValid) <+ NotValid)
+    out1  = head mem
+    out2  = head (tail mem) 
+\end{verbatim}
+\end{itemize}
+\end{frame}
+
+\frame{
+\frametitle{FIFO Buffer}
+\begin{itemize}
+  \item Wish: Dynamically sized vectors
+  \item Reality: Statically sized vectors
+\end{itemize}
+}
+
+\frame{
+\frametitle{Dynamically Sized Vectors}
+\begin{itemize}
+  \item Map all vectors to RAMs:
+  \begin{itemize}
+    \item Store length separately, extra logic
+    \item What happens if size exceeds size of 1 blockRAM?
+  \end{itemize}
+  \item Translate to (shift/circular) Buffers
+  \begin{itemize}
+  \item Requires analysis of data-access
+  \item How do we determine maximum size?
+  \end{itemize}
+\end{itemize}
+}
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