% Macro for certain acronyms in small caps. Doesn't work with the
% default font, though (it contains no smallcaps it seems).
\def\acro#1{{\small{#1}}}
+\def\acrotiny#1{{\scriptsize{#1}}}
\def\VHDL{\acro{VHDL}}
\def\GHC{\acro{GHC}}
\def\CLaSH{{\small{C}}$\lambda$a{\small{SH}}}
+\def\CLaSHtiny{{\scriptsize{C}}$\lambda$a{\scriptsize{SH}}}
% Macro for pretty printing haskell snippets. Just monospaced for now, perhaps
% we'll get something more complex later on.
% author names and affiliations
% use a multiple column layout for up to three different
% affiliations
-\author{\IEEEauthorblockN{Christiaan P.R. Baaij, Matthijs Kooijman, Jan Kuper, Marco E.T. Gerards, Bert Molenkamp, Sabih H. Gerez}
-\IEEEauthorblockA{University of Twente, Department of EEMCS\\
+\author{\IEEEauthorblockN{Christiaan P.R. Baaij, Matthijs Kooijman, Jan Kuper, Marco E.T. Gerards}%, Bert Molenkamp, Sabih H. Gerez}
+\IEEEauthorblockA{%Computer Architecture for Embedded Systems (CAES)\\
+Department of EEMCS, University of Twente\\
P.O. Box 217, 7500 AE, Enschede, The Netherlands\\
c.p.r.baaij@@utwente.nl, matthijs@@stdin.nl, j.kuper@@utwente.nl}}
% \and
\section{Introduction}
-Hardware description languages has allowed the productivity of hardware
+Hardware description languages have allowed the productivity of hardware
engineers to keep pace with the development of chip technology. Standard
Hardware description languages, like \VHDL~\cite{VHDL2008} and
Verilog~\cite{Verilog}, allowed an engineer to describe circuits using a
and types that together form the language primitives of the domain specific
language. As a result of how the signals are modeled and abstracted, the
functions used to describe a circuit also build a large domain-specific
-datatype (hidden from the designer) which can be further processed by an
+datatype (hidden from the designer) which can then be processed further by an
embedded compiler. This compiler actually runs in the same environment as the
description; as a result compile-time and run-time become hard to define, as
the embedded compiler is usually compiled by the same Haskell compiler as the
capture certain language constructs, such as Haskell's choice elements
(if-constructs, case-constructs, pattern matching, etc.), which are not
available in the functional hardware description languages that are embedded
-in Haskell as a domain specific languages. As far as the authors know, such
+in Haskell as a domain specific language. As far as the authors know, such
extensive support for choice-elements is new in the domain of functional
hardware description languages. As the hardware descriptions are plain Haskell
functions, these descriptions can be compiled for simulation using an
Where descriptions in a conventional hardware description language have an
explicit clock for the purpose state and synchronicity, the clock is implied
in this research. A developer describes the behavior of the hardware between
-clock cycles, as such, only synchronous systems can be described. Many
-functional hardware description model signals as a stream of all values over
-time; state is then modeled as a delay on this stream of values. The approach
-taken in this research is to make the current state of a circuit part of the
-input of the function and the updated state part of the output.
+clock cycles. Many functional hardware description model signals as a stream
+of all values over time; state is then modeled as a delay on this stream of
+values. The approach taken in this research is to make the current state of a
+circuit part of the input of the function and the updated state part of the
+output. The current abstraction of state and time limits the descriptions to
+synchronous hardware, there however is room within the language to eventually
+add a different abstraction mechanism that will allow for the modeling of
+asynchronous systems.
Like the standard hardware description languages, descriptions made in a
functional hardware description language must eventually be converted into a
-netlist. This research also features a prototype translator called \CLaSH\
-(pronounced: clash), which converts the Haskell code to equivalently behaving
-synthesizable \VHDL\ code, ready to be converted to an actual netlist format
-by an (optimizing) \VHDL\ synthesis tool.
+netlist. This research also features a prototype translator, which has the
+same name as the language: \CLaSH\footnote{\CLaSHtiny: \acrotiny{CAES}
+Language for Synchronous Hardware} (pronounced: clash). This compiler converts
+the Haskell code to equivalently behaving synthesizable \VHDL\ code, ready to
+be converted to an actual netlist format by an (optimizing) \VHDL\ synthesis
+tool.
+
+Besides trivial circuits such as variants of both the FIR filter and the
+simple CPU shown in \Cref{sec:usecases}, the \CLaSH\ compiler has also been
+shown to work for non-trivial descriptions. \CLaSH\ has been able to
+successfully translate the functional description of a streaming reduction
+circuit~\cite{reductioncircuit} for floating point numbers.
\section{Hardware description in Haskell}
and
\item function applications are translated to component instantiations.
\end{inparaenum}
- The output port can have a complex type (such as a tuple), so having just
- a single output port does not pose any limitation. The arguments of a
- function applications are assigned to a signal, which are then mapped to
+ The output port can have a structured type (such as a tuple), so having
+ just a single output port does not pose any limitation. The arguments of a
+ function application are assigned to signals, which are then mapped to
the corresponding input ports of the component. The output port of the
function is also mapped to a signal, which is used as the result of the
application itself.
Since every top level function generates its own component, the
hierarchy of function calls is reflected in the final netlist,% aswell,
- creating a hierarchical description of the hardware. This separation in
- different components makes the resulting \VHDL\ output easier to read and
- debug.
+ creating a hierarchical description of the hardware. The separation in
+ different components makes it easier for a developer to understand and
+ possibly hand-optimize the resulting \VHDL\ output of the \CLaSH\
+ compiler.
As an example we can see the netlist of the |mac| function in
\Cref{img:mac-comb}; the |mac| function applies both the |mul| and |add|
\label{img:mac-comb}
\end{figure}
- The result of using a complex input type can be seen in
+ The result of using a structural input type can be seen in
\cref{img:mac-comb-nocurry} where the |mac| function now uses a single
input tuple for the |a|, |b|, and |c| arguments:
\subsection{Choice}
In Haskell, choice can be achieved by a large set of language constructs,
consisting of: \hs{case} constructs, \hs{if-then-else} constructs,
- pattern matching, and guards. The easiest of these are the \hs{case}
+ pattern matching, and guards. The most general of these are the \hs{case}
constructs (\hs{if} expressions can be very directly translated to
\hs{case} expressions). A \hs{case} construct is translated to a
multiplexer, where the control value is linked to the selection port and
% assignment in \VHDL, where the conditions use equality comparisons
% against the constructors in the \hs{case} expressions.
We can see two versions of a contrived example below, the first
- using a \hs{case} construct and the other using a \hs{if-then-else}
- constructs, in the code below. The example sums two values when they are
- equal or non-equal (depending on the predicate given) and returns 0
- otherwise. Both versions of the example roughly correspond to the same
- netlist, which is depicted in \Cref{img:choice}.
+ using a \hs{case} construct and the other using an \hs{if-then-else}
+ construct, in the code below. The examples sums two values when they are
+ equal or non-equal (depending on the given predicate, the \hs{pred}
+ variable) and returns 0 otherwise. The \hs{pred} variable has the
+ following, user-defined, enumeration datatype:
\begin{code}
+ data Pred = Equiv | NotEquiv
+ \end{code}
+
+ The naive netlist corresponding to both versions of the example is
+ depicted in \Cref{img:choice}.
+
+ \begin{code}
sumif pred a b = case pred of
- Eq -> case a == b of
- True -> a + b
- False -> 0
- Neq -> case a != b of
- True -> a + b
- False -> 0
+ Equiv -> case a == b of
+ True -> a + b
+ False -> 0
+ NotEquiv -> case a != b of
+ True -> a + b
+ False -> 0
\end{code}
\begin{code}
sumif pred a b =
- if pred == Eq then
+ if pred == Equiv then
if a == b then a + b else 0
else
if a != b then a + b else 0
\label{img:choice}
\end{figure}
- A slightly more complex (but very powerful) form of choice is pattern
+ A user-friendly and also very powerful form of choice is pattern
matching. A function can be defined in multiple clauses, where each clause
- specifies a pattern. When the arguments match the pattern, the
+ corresponds to a pattern. When an argument matches a pattern, the
corresponding clause will be used. Expressions can also contain guards,
- where the expression is only executed if the guard evaluates to true. Like
+ where the expression is only executed if the guard evaluates to true, and
+ continues with the next clause if the guard evaluates to false. Like
\hs{if-then-else} constructs, pattern matching and guards have a
(straightforward) translation to \hs{case} constructs and can as such be
mapped to multiplexers. A third version of the earlier example, using both
- pattern matching and guards, can be seen below. The version using pattern
- matching and guards also has roughly the same netlist representation
- (\Cref{img:choice}) as the earlier two versions of the example.
+ pattern matching and guards, can be seen below. The guard is the
+ expression that follows the vertical bar (\hs{|}) and precedes the
+ assignment operator (\hs{=}). The \hs{otherwise} guards always evaluate to
+ \hs{true}.
+
+ The version using pattern matching and guards corresponds to the same
+ naive netlist representation (\Cref{img:choice}) as the earlier two
+ versions of the example.
\begin{code}
- sumif Eq a b | a == b = a + b
- sumif Neq a b | a != b = a + b
- sumif _ _ _ = 0
+ sumif Equiv a b | a == b = a + b
+ | otherwise = 0
+ sumif NotEquiv a b | a != b = a + b
+ | otherwise = 0
\end{code}
% \begin{figure}
\subsection{Types}
Haskell is a statically-typed language, meaning that the type of a
variable or function is determined at compile-time. Not all of Haskell's
- typing constructs have a clear translation to hardware, as such this
- section will only deal with the types that do have a clear correspondence
+ typing constructs have a clear translation to hardware, this section will
+ therefor only deal with the types that do have a clear correspondence
to hardware. The translatable types are divided into two categories:
\emph{built-in} types and \emph{user-defined} types. Built-in types are
those types for which a direct translation is defined within the \CLaSH\
% using translation rules that are discussed later on.
\subsubsection{Built-in types}
- The following types have direct translation defined within the \CLaSH\
+ The following types have direct translations defined within the \CLaSH\
compiler:
\begin{xlist}
\item[\bf{Bit}]
- This is the most basic type available. It can have two values:
- \hs{Low} and \hs{High}.
+ the most basic type available. It can have two values:
+ \hs{Low} or \hs{High}.
% It is mapped directly onto the \texttt{std\_logic} \VHDL\ type.
\item[\bf{Bool}]
- This is a basic logic type. It can have two values: \hs{True}
- and \hs{False}.
+ this is a basic logic type. It can have two values: \hs{True}
+ or \hs{False}.
% It is translated to \texttt{std\_logic} exactly like the \hs{Bit}
% type (where a value of \hs{True} corresponds to a value of
% \hs{High}).
\hs{if-then-else} construct, which requires a \hs{Bool} value for
the condition.
\item[\bf{SizedWord}, \bf{SizedInt}]
- These are types to represent integers. A \hs{SizedWord} is unsigned,
+ these are types to represent integers. A \hs{SizedWord} is unsigned,
while a \hs{SizedInt} is signed. Both are parametrizable in their
size.
% , so you can define an unsigned word of 32 bits wide as follows:
% types are translated to the \VHDL\ \texttt{unsigned} and
% \texttt{signed} respectively.
\item[\bf{Vector}]
- This is a vector type that can contain elements of any other type and
+ this is a vector type that can contain elements of any other type and
has a fixed length. The \hs{Vector} type constructor takes two type
arguments: the length of the vector and the type of the elements
contained in it. The short-hand notation used for the vector type in
% \hs{RegisterState} type is a vector of 8 32-bit words. A fixed size
% vector is translated to a \VHDL\ array type.
\item[\bf{Index}]
- This is another type to describe integers, but unlike the previous
+ this is another type to describe integers, but unlike the previous
two it has no specific bit-width, but an upper bound. This means that
its range is not limited to powers of two, but can be any number.
An \hs{Index} only has an upper bound, its lower bound is
data-types with the \hs{data} keyword, type synonyms with the \hs{type}
keyword and datatype renaming constructs with the \hs{newtype} keyword.
\GHC\ offers a few more advanced ways to introduce types (type families,
- existential typing, {\small{GADT}}s, etc.) which are not standard Haskell.
+ existential typing, {\acro{GADT}}s, etc.) which are not standard Haskell.
As it is currently unclear how these advanced type constructs correspond
- with hardware, they are for now unsupported by the \CLaSH\ compiler
+ to hardware, they are for now unsupported by the \CLaSH\ compiler.
Only an algebraic datatype declaration actually introduces a
- completely new type. Type synonyms and renaming constructs only define new
+ completely new type. Type synonyms and type renaming only define new
names for existing types, where synonyms are completely interchangeable
- and renaming constructs need explicit conversions. Therefore, these do not
+ and type renaming requires explicit conversions. Therefore, these do not
need any particular translation, a synonym or renamed type will just use
the same representation as the original type. For algebraic types, we can
make the following distinctions:
Algebraic datatypes with multiple constructors, but without any
fields are essentially a way to get an enumeration-like type
containing alternatives. Note that Haskell's \hs{Bool} type is also
- defined as an enumeration type, but we have a fixed translation for
- that. An example of such an enum type is the type that represents the
- colors in a traffic light:
+ defined as an enumeration type, but that there a fixed translation for
+ that type within the \CLaSH\ compiler. An example of such an
+ enumeration type is the type that represents the colors in a traffic
+ light:
\begin{code}
data TrafficLight = Red | Orange | Green
\end{code}
% value.
\item[\bf{Multiple constructors with fields}]
Algebraic datatypes with multiple constructors, where at least
- one of these constructors has one or more fields are not
- currently supported.
+ one of these constructors has one or more fields are currently not
+ supported.
\end{xlist}
\subsection{Polymorphism}
- A powerful construct in most functional languages is polymorphism, it
- allows a function to handle values of different data types in a uniform
- way. Haskell supports \emph{parametric polymorphism}~\cite{polymorphism},
- meaning functions can be written without mention of any specific type and
- can be used transparently with any number of new types.
+ A powerful feature of most (functional) programming languages is
+ polymorphism, it allows a function to handle values of different data
+ types in a uniform way. Haskell supports \emph{parametric
+ polymorphism}~\cite{polymorphism}, meaning functions can be written
+ without mention of any specific type and can be used transparently with
+ any number of new types.
As an example of a parametric polymorphic function, consider the type of
the following \hs{append} function, which appends an element to a vector:
+
\begin{code}
append :: [a|n] -> a -> [a|n + 1]
\end{code}
type classes, where a class definition provides the general interface of a
function, and class instances define the functionality for the specific
types. An example of such a type class is the \hs{Num} class, which
- contains all of Haskell's numerical operations. A developer can make use
+ contains all of Haskell's numerical operations. A designer can make use
of this ad-hoc polymorphism by adding a constraint to a parametrically
polymorphic type variable. Such a constraint indicates that the type
variable can only be instantiated to a type whose members supports the
In \CLaSH, parametric polymorphism is completely supported. Any function
defined can have any number of unconstrained type parameters. The \CLaSH\
compiler will infer the type of every such argument depending on how the
- function is applied. There is one exception to this: The top level
- function that is translated, can not have any polymorphic arguments (as
- they are never applied, so there is no way to find out the actual types
- for the type parameters).
+ function is applied. There is however one constraint: the top level
+ function that is being translated can not have any polymorphic arguments.
+ The arguments can not be polymorphic as they are never applied and
+ consequently there is no way to determine the actual types for the type
+ parameters.
\CLaSH\ does not support user-defined type classes, but does use some
- of the built-in type classes for its built-in function, such as: \hs{Num}
- for numerical operations, \hs{Eq} for the equality operators, and
+ of the standard Haskell type classes for its built-in function, such as:
+ \hs{Num} for numerical operations, \hs{Eq} for the equality operators, and
\hs{Ord} for the comparison/order operators.
\subsection{Higher-order functions \& values}
function. The following example should clarify this concept:
\begin{code}
- negVector xs = map not xs
+ negateVector xs = map not xs
\end{code}
- The code above defines a function \hs{negVector}, which takes a vector of
- booleans, and returns a vector where all the values are negated. It
- achieves this by calling the \hs{map} function, and passing it
+ The code above defines the \hs{negateVector} function, which takes a
+ vector of booleans, \hs{xs}, and returns a vector where all the values are
+ negated. It achieves this by calling the \hs{map} function, and passing it
\emph{another function}, boolean negation, and the vector of booleans,
\hs{xs}. The \hs{map} function applies the negation function to all the
elements in the vector.
The \hs{map} function is called a higher-order function, since it takes
another function as an argument. Also note that \hs{map} is again a
- parametric polymorphic function: It does not pose any constraints on the
+ parametric polymorphic function: it does not pose any constraints on the
type of the vector elements, other than that it must be the same type as
the input type of the function passed to \hs{map}. The element type of the
resulting vector is equal to the return type of the function passed, which
expression, that adds one to every element of a vector:
\begin{code}
- map ((+) 1) xs
+ map (+ 1) xs
\end{code}
- Here, the expression \hs{(+) 1} is the partial application of the
+ Here, the expression \hs{(+ 1)} is the partial application of the
plus operator to the value \hs{1}, which is again a function that
adds one to its argument. A lambda expression allows one to introduce an
anonymous function in any expression. Consider the following expression,
\end{code}
Finally, higher order arguments are not limited to just built-in
- functions, but any function defined in \CLaSH\ can have function
+ functions, but any function defined by a developer can have function
arguments. This allows the hardware designer to use a powerful
abstraction mechanism in his designs and have an optimal amount of
- code reuse.
+ code reuse. The only exception is again the top-level function: if a
+ function-typed argument is not applied with an actual function, no
+ hardware can be generated.
- \comment{TODO: Describe ALU example (no code)}
+ % \comment{TODO: Describe ALU example (no code)}
\subsection{State}
- A very important concept in hardware it the concept of state. In a
+ A very important concept in hardware is the concept of state. In a
stateful design, the outputs depend on the history of the inputs, or the
state. State is usually stored in registers, which retain their value
during a clock cycle. As we want to describe more than simple
% This purity property is important for functional languages, since it
% enables all kinds of mathematical reasoning that could not be guaranteed
% correct for impure functions.
- Pure functions are as such a perfect match or a combinatorial circuit,
- where the output solely depends on the inputs. When a circuit has state
+ Pure functions are as such a perfect match for combinatorial circuits,
+ where the output solely depends on the inputs. When a circuit has state
however, it can no longer be simply described by a pure function.
% Simply removing the purity property is not a valid option, as the
% language would then lose many of it mathematical properties.
- In an effort to include the concept of state in pure
- functions, the current value of the state is made an argument of the
- function; the updated state becomes part of the result. In this sense the
- descriptions made in \CLaSH are the describing the combinatorial parts of
- a mealy machine.
+ In \CLaSH\ we deal with the concept of state in pure functions by making
+ current value of the state an additional argument of the function and the
+ updated state part of result. In this sense the descriptions made in
+ \CLaSH\ are the combinatorial parts of a mealy machine.
A simple example is adding an accumulator register to the earlier
multiply-accumulate circuit, of which the resulting netlist can be seen in
\Cref{img:mac-state}:
\begin{code}
- macS (State c) a b = (State c', outp)
+ macS (State c) a b = (State c', c')
where
- outp = mac a b c
- c' = outp
+ c' = mac a b c
\end{code}
\begin{figure}
The \hs{State} keyword indicates which arguments are part of the current
state, and what part of the output is part of the updated state. This
- aspect will also reflected in the type signature of the function.
+ aspect will also be reflected in the type signature of the function.
Abstracting the state of a circuit in this way makes it very explicit:
which variables are part of the state is completely determined by the
type signature. This approach to state is well suited to be used in
stateful descriptions using the recursive \hs{run} function:
\begin{code}
- run f s (i:inps) = o : (run f s' inps)
+ run f s (i : inps) = o : (run f s' inps)
where
(s', o) = f s i
\end{code}
- The \hs{run} function maps a list of inputs over the function that a
- developer wants to simulate, passing the state to each new iteration. Each
- value in the input list corresponds to exactly one cycle of the (implicit)
- clock. The result of the simulation is a list of outputs for every clock
- cycle. As both the \hs{run} function and the hardware description are
- plain hardware, the complete simulation can be compiled by an optimizing
- Haskell compiler.
+ The \hs{(:)} operator is the list concatenation operator, where the
+ left-hand side is the head of a list and the right-hand side is the
+ remainder of the list. The \hs{run} function applies the function the
+ developer wants to simulate, \hs{f}, to the current state, \hs{s}, and the
+ first input value, \hs{i}. The result is the first output value, \hs{o},
+ and the updated state \hs{s'}. The next iteration of the \hs{run} function
+ is then called with the updated state, \hs{s'}, and the rest of the
+ inputs, \hs{inps}. It is assumed that there is one input per clock cycle.
+ Also note how the order of the input, output, and state in the \hs{run}
+ function corresponds with the order of the input, output and state of the
+ \hs{macS} function described earlier.
-\section{\CLaSH\ prototype}
-
-The \CLaSH language as presented above can be translated to \VHDL using
-the prototype \CLaSH compiler. This compiler allows experimentation with
-the \CLaSH language and allows for running \CLaSH designs on actual FPGA
-hardware.
-
-\comment{Add clash pipeline image}
-The prototype heavily uses \GHC, the Glasgow Haskell Compiler. Figure
-TODO shows the \CLaSH compiler pipeline. As you can see, the frontend
-is completely reused from \GHC, which allows the \CLaSH prototype to
-support most of the Haskell Language. The \GHC frontend produces the
-program in the \emph{Core} format, which is a very small, functional,
-typed language which is relatively easy to process.
-
-The second step in the compilation process is \emph{normalization}. This
-step runs a number of \emph{meaning preserving} transformations on the
-Core program, to bring it into a \emph{normal form}. This normal form
-has a number of restrictions that make the program similar to hardware.
-In particular, a program in normal form no longer has any polymorphism
-or higher order functions.
-
-The final step is a simple translation to \VHDL.
+ As both the \hs{run} function, the hardware description, and the test
+ inputs are plain Haskell, the complete simulation can be compiled to an
+ executable binary by an optimizing Haskell compiler, or executed in an
+ Haskell interpreter. Both simulation paths are much faster than first
+ translating the description to \VHDL\ and then running a \VHDL\
+ simulation, where the executable binary has an additional simulation speed
+ bonus in case there is a large set of test inputs.
+
+\section{\CLaSH\ compiler}
+An important aspect in this research is the creation of the prototype compiler, which allows us to translate descriptions made in the \CLaSH\ language as described in the previous section to synthesizable \VHDL, allowing a designer to actually run a \CLaSH\ design on an \acro{FPGA}.
+
+The Glasgow Haskell Compiler (\GHC) is an open-source Haskell compiler that
+also provides a high level API to most of its internals. The availability of
+this high-level API obviated the need to design many of the tedious parts of
+the prototype compiler, such as the parser, semantic checker, and especially
+the type-checker. The parser, semantic checker, and type-checker together form
+the front-end of the prototype compiler pipeline, as depicted in
+\Cref{img:compilerpipeline}.
+
+\begin{figure}
+\centerline{\includegraphics{compilerpipeline.svg}}
+\caption{\CLaSHtiny\ compiler pipeline}
+\label{img:compilerpipeline}
+\end{figure}
+
+The output of the \GHC\ front-end is the original Haskell description
+translated to \emph{Core}~\cite{Sulzmann2007}, which is smaller, functional,
+typed language that is relatively easier to process than the larger Haskell
+language. A description in \emph{Core} can still contain properties which have
+no direct translation to hardware, such as polymorphic types and
+function-valued arguments. Such a description needs to be transformed to a
+\emph{normal form}, which only contains properties that have a direct
+translation. The second stage of the compiler, the \emph{normalization} phase
+exhaustively applies a set of \emph{meaning-preserving} transformations on the
+\emph{Core} description until this description is in a \emph{normal form}.
+This set of transformations includes transformations typically found in
+reduction systems for lambda calculus, such a $\beta$-reduction and
+$\eta$-expansion, but also includes \emph{defunctionalization} transformations
+which reduce higher-order functions to `regular' first-order functions.
+
+The final step in the compiler pipeline is the translation to a \VHDL\
+\emph{netlist}, which is a straightforward process due to resemblance of a
+normalized description and a set of concurrent signal assignments. We call the
+end-product of the \CLaSH\ compiler a \VHDL\ \emph{netlist} as the resulting
+\VHDL\ resembles an actual netlist description and not idiomatic \VHDL.
\section{Use cases}
+\label{sec:usecases}
As an example of a common hardware design where the use of higher-order
functions leads to a very natural description is a FIR filter, which is
basically the dot-product of two vectors:
\begin{figure}
\centerline{\includegraphics{4tapfir.svg}}
-\caption{4-taps FIR Filter}
+\caption{4-taps \acrotiny{FIR} Filter}
\label{img:4tapfir}
\end{figure}
+
+\subsection{Higher order CPU}
+
+
+\begin{code}
+type FuState = State Word
+fu :: (a -> a -> a)
+ -> [a]:n
+ -> (RangedWord n, RangedWord n)
+ -> FuState
+ -> (FuState, a)
+fu op inputs (addr1, addr2) (State out) =
+ (State out', out)
+ where
+ in1 = inputs!addr1
+ in2 = inputs!addr2
+ out' = op in1 in2
+\end{code}
+
+\begin{code}
+type CpuState = State [FuState]:4
+cpu :: Word
+ -> [(RangedWord 7, RangedWord 7)]:4
+ -> CpuState
+ -> (CpuState, Word)
+cpu input addrs (State fuss) =
+ (State fuss', out)
+ where
+ fures = [ fu const inputs!0 fuss!0
+ , fu (+) inputs!1 fuss!1
+ , fu (-) inputs!2 fuss!2
+ , fu (*) inputs!3 fuss!3
+ ]
+ (fuss', outputs) = unzip fures
+ inputs = 0 +> 1 +> input +> outputs
+ out = head outputs
+\end{code}
+
\section{Related work}
Many functional hardware description languages have been developed over the
years. Early work includes such languages as $\mu$\acro{FP}~\cite{muFP}, an
heterogeneous models of computation, which include continuous time,
synchronous and untimed models of computation. Using so-called domain
interfaces a designer can simulate electronic systems which have both analog
-as digital parts. ForSyDe has several simulation and synthesis backends,
-though synthesis is restricted to the synchronous subset of the ForSyDe
-language. Unlike \CLaSH\ there is no support for the automated synthesis of description that contain polymorphism or higher-order functions.
+as digital parts. ForSyDe has several backends including simulation and
+automated synthesis, though automated synthesis is restricted to the
+synchronous model of computation within ForSyDe. Unlike \CLaSH\ there is no
+support for the automated synthesis of descriptions that contain polymorphism
+or higher-order functions.
Lava~\cite{Lava} is a hardware description language that focuses on the
structural representation of hardware. Besides support for simulation and
generators when viewed from a synthesis viewpoint, in that the language
elements of Haskell, such as choice, can be used to guide the circuit
generation. If a developer wants to insert a choice element inside an actual
-circuit he will have to specify this explicitly as a component.
+circuit he will have to explicitly instantiate a multiplexer-like component.
In this respect \CLaSH\ differs from Lava, in that all the choice elements,
such as case-statements and pattern matching, are synthesized to choice
The merits of polymorphic typing, combined with higher-order functions, are
now also recognized in the `main-stream' hardware description languages,
-exemplified by the new \VHDL-2008 standard~\cite{VHDL2008}. \VHDL-2008 has
-support to specify types as generics, thus allowing a developer to describe
+exemplified by the new \VHDL-2008 standard~\cite{VHDL2008}. \VHDL-2008 support for generics has been extended to types, allowing a developer to describe
polymorphic components. Note that those types still require an explicit
-generic map, whereas type-inference and type-specialization are implicit in
-\CLaSH.
+generic map, whereas types can be automatically inferred in \CLaSH.
% Wired~\cite{Wired},, T-Ruby~\cite{T-Ruby}, Hydra~\cite{Hydra}.
%
% http://www.michaelshell.org/tex/ieeetran/bibtex/
\bibliographystyle{IEEEtran}
% argument is your BibTeX string definitions and bibliography database(s)
-\bibliography{IEEEabrv,clash.bib}
+\bibliography{clash}
%
% <OR> manually copy in the resultant .bbl file
% set second argument of \begin to the number of references
projects / matthijs / master-project / dsd-paper.git / blobdiff