Fix some additional spelling mistakes

[matthijs/master-project/dsd-paper.git] / cλash.lhs

diff --git a/cλash.lhs b/cλash.lhs
index 2a384a0ed9b9c749a9d5380860021ec76d8b5bec..d2820a4c152761b9d305a0586f8a443d79beafa7 100644 (file)
--- a/cλash.lhs
+++ b/cλash.lhs
@@ -548,9 +548,9 @@ the Haskell code to equivalently behaving synthesizable \VHDL\ code, ready to
 be converted to an actual netlist format by an (optimizing) \VHDL\ synthesis 
 tool.
 
-Besides trivial circuits such as variants of both the FIR filter and the 
-simple CPU shown in \Cref{sec:usecases}, the \CLaSH\ compiler has also been 
-shown to work for non-trivial descriptions. \CLaSH\ has been able to 
+Besides trivial circuits such as variants of both the \acro{FIR} filter and 
+the simple \acro{CPU} shown in \Cref{sec:usecases}, the \CLaSH\ compiler has 
+also been shown to work for non-trivial descriptions. \CLaSH\ has been able to 
 successfully translate the functional description of a streaming reduction 
 circuit~\cite{reductioncircuit} for floating point numbers.
 
@@ -702,9 +702,9 @@ circuit~\cite{reductioncircuit} for floating point numbers.
     compiler. The \CLaSH\ compiler has generic translation rules to
     translated the user-defined types described below.
 
-    The \CLaSH compiler is able to infer unspecified types,
+    The \CLaSH\ compiler is able to infer unspecified types,
     meaning that a developer does not have to annotate every function with a 
-    type signature (though it is good practice to do so anyway).
+    type signature (even if it is good practice to do so).
   
     % Translation of two most basic functional concepts has been
     % discussed: function application and choice. Before looking further
@@ -762,7 +762,7 @@ circuit~\cite{reductioncircuit} for floating point numbers.
         the rest of paper is: \hs{[a|n]}. Where the \hs{a} is the element 
         type, and \hs{n} is the length of the vector. Note that this is
         a notation used in this paper only, vectors are slightly more
-        elaborate in real \CLaSH programs.
+        elaborate in real \CLaSH\ programs.
         % The state type of an 8 element register bank would then for example 
         % be:
 
@@ -1107,9 +1107,8 @@ end-product of the \CLaSH\ compiler a \VHDL\ \emph{netlist} as the resulting
 \VHDL\ resembles an actual netlist description and not idiomatic \VHDL.
 
 \section{Use cases}
-
-\subsection{FIR Filter}
 \label{sec:usecases}
+\subsection{FIR Filter}
 As an example of a common hardware design where the use of higher-order
 functions leads to a very natural description is a \acro{FIR} filter, which is 
 basically the dot-product of two vectors:
@@ -1193,12 +1192,11 @@ the vectors of the \acro{FIR} code to a length of 4, is depicted in
 \subsection{Higher order CPU}
 
 \begin{code}
-type FuState = State Word
 fu :: (a -> a -> a)
-      -> [a]:n
-      -> (RangedWord n, RangedWord n)
-      -> FuState
-      -> (FuState, a)
+      -> [a | n]
+      -> (Index (n - 1), Index (n - 1))
+      -> a
+      -> (a, a)
 fu op inputs (addr1, addr2) (State out) =
   (State out', out)
   where
@@ -1208,22 +1206,22 @@ fu op inputs (addr1, addr2) (State out) =
 \end{code}
 
 \begin{code}
-type CpuState = State [FuState]:4
+type CpuState = State [Word | 4]
+
 cpu :: Word 
-       -> [(RangedWord 7, RangedWord 7)]:4
+       -> [(Index 6, Index 6) | 4]
        -> CpuState
        -> (CpuState, Word)
-cpu input addrs (State fuss) =
-  (State fuss', out)
+cpu input addrs (State fuss) = (State fuss', out)
   where
-    fures = [ fu const inputs!0 fuss!0
-            , fu (+)   inputs!1 fuss!1
-            , fu (-)   inputs!2 fuss!2
-            , fu (*)   inputs!3 fuss!3
-            ]
-    (fuss', outputs) = unzip fures
-    inputs = 0 +> 1 +> input +> outputs
-    out = head outputs
+    fures =   [ fu const  inputs (addrs!0) (fuss!0)
+              , fu (+)    inputs (addrs!1) (fuss!1)
+              , fu (-)    inputs (addrs!2) (fuss!2)
+              , fu (*)    inputs (addrs!3) (fuss!3)
+              ]
+    (fuss', outputs)  = unzip fures
+    inputs            = 0 +> (1 +> (input +> outputs))
+    out               = head outputs
 \end{code}
 
 \section{Related work}
@@ -1238,7 +1236,7 @@ circuits, and has a particular focus on layout.
 functional language \acro{ML}, and has support for polymorphic types and 
 higher-order functions. Published work suggests that there is no direct 
 simulation support for \acro{HML}, but that a description in \acro{HML} has to 
-be translated to \VHDL\ and that the translated description can than be 
+be translated to \VHDL\ and that the translated description can then be 
 simulated in a \VHDL\ simulator. Also not all of the mentioned language 
 features of \acro{HML} could be translated to hardware. The \CLaSH\ compiler 
 on the other hand can correctly translate all of the language constructs