1 module Translator where
4 import qualified CoreUtils
8 import qualified DataCon
10 import qualified Module
11 import qualified Control.Monad.State as State
13 import qualified Data.Map as Map
15 import NameEnv ( lookupNameEnv )
16 import HscTypes ( cm_binds, cm_types )
17 import MonadUtils ( liftIO )
18 import Outputable ( showSDoc, ppr )
19 import GHC.Paths ( libdir )
20 import DynFlags ( defaultDynFlags )
23 import qualified Monad
25 -- The following modules come from the ForSyDe project. They are really
26 -- internal modules, so ForSyDe.cabal has to be modified prior to installing
27 -- ForSyDe to get access to these modules.
28 import qualified ForSyDe.Backend.VHDL.AST as AST
29 import qualified ForSyDe.Backend.VHDL.Ppr
30 import qualified ForSyDe.Backend.VHDL.FileIO
31 import qualified ForSyDe.Backend.Ppr
32 -- This is needed for rendering the pretty printed VHDL
33 import Text.PrettyPrint.HughesPJ (render)
35 import TranslatorTypes
42 defaultErrorHandler defaultDynFlags $ do
43 runGhc (Just libdir) $ do
44 dflags <- getSessionDynFlags
45 setSessionDynFlags dflags
46 --target <- guessTarget "adder.hs" Nothing
47 --liftIO (print (showSDoc (ppr (target))))
48 --liftIO $ printTarget target
51 --core <- GHC.compileToCoreSimplified "Adders.hs"
52 core <- GHC.compileToCoreSimplified "Adders.hs"
53 --liftIO $ printBinds (cm_binds core)
54 let binds = Maybe.mapMaybe (findBind (cm_binds core)) ["sfull_adder"]
55 liftIO $ putStr $ prettyShow binds
56 -- Turn bind into VHDL
57 let (vhdl, sess) = State.runState (mkVHDL binds) (VHDLSession core 0 Map.empty)
58 liftIO $ putStr $ render $ ForSyDe.Backend.Ppr.ppr vhdl
59 liftIO $ ForSyDe.Backend.VHDL.FileIO.writeDesignFile vhdl "../vhdl/vhdl/output.vhdl"
60 liftIO $ putStr $ "\n\nFinal session:\n" ++ prettyShow sess ++ "\n\n"
63 -- Turns the given bind into VHDL
65 -- Add the builtin functions
66 mapM addBuiltIn builtin_funcs
67 -- Create entities and architectures for them
68 mapM processBind binds
69 return $ AST.DesignFile
73 findBind :: [CoreBind] -> String -> Maybe CoreBind
74 findBind binds lookfor =
75 -- This ignores Recs and compares the name of the bind with lookfor,
76 -- disregarding any namespaces in OccName and extra attributes in Name and
80 NonRec var _ -> lookfor == (occNameString $ nameOccName $ getName var)
83 -- | Processes the given bind as a top level bind.
85 CoreBind -- The bind to process
88 processBind (Rec _) = error "Recursive binders not supported"
89 processBind bind@(NonRec var expr) = do
90 -- Create the function signature
91 let ty = CoreUtils.exprType expr
92 let hsfunc = mkHsFunction var ty
93 flattenBind hsfunc bind
95 -- | Flattens the given bind into the given signature and adds it to the
96 -- session. Then (recursively) finds any functions it uses and does the same
99 HsFunction -- The signature to flatten into
100 -> CoreBind -- The bind to flatten
103 flattenBind _ (Rec _) = error "Recursive binders not supported"
105 flattenBind hsfunc bind@(NonRec var expr) = do
106 -- Flatten the function
107 let flatfunc = flattenFunction hsfunc bind
109 setFlatFunc hsfunc flatfunc
110 let used_hsfuncs = map appFunc (apps flatfunc)
111 State.mapM resolvFunc used_hsfuncs
114 -- | Find the given function, flatten it and add it to the session. Then
115 -- (recursively) do the same for any functions used.
117 HsFunction -- | The function to look for
120 resolvFunc hsfunc = do
121 -- See if the function is already known
122 func <- getFunc hsfunc
124 -- Already known, do nothing
127 -- New function, resolve it
129 -- Get the current module
131 -- Find the named function
132 let bind = findBind (cm_binds core) name
134 Nothing -> error $ "Couldn't find function " ++ name ++ " in current module."
135 Just b -> flattenBind hsfunc b
137 name = hsFuncName hsfunc
139 -- | Translate a top level function declaration to a HsFunction. i.e., which
140 -- interface will be provided by this function. This function essentially
141 -- defines the "calling convention" for hardware models.
143 Var.Var -- ^ The function defined
144 -> Type -- ^ The function type (including arguments!)
145 -> HsFunction -- ^ The resulting HsFunction
148 HsFunction hsname hsargs hsres
150 hsname = getOccString f
151 (arg_tys, res_ty) = Type.splitFunTys ty
152 -- The last argument must be state
153 state_ty = last arg_tys
154 state = useAsState (mkHsValueMap state_ty)
155 -- All but the last argument are inports
156 inports = map (useAsPort . mkHsValueMap)(init arg_tys)
157 hsargs = inports ++ [state]
158 hsres = case splitTupleType res_ty of
159 -- Result type must be a two tuple (state, ports)
160 Just [outstate_ty, outport_ty] -> if Type.coreEqType state_ty outstate_ty
162 Tuple [state, useAsPort (mkHsValueMap outport_ty)]
164 error $ "Input state type of function " ++ hsname ++ ": " ++ (showSDoc $ ppr state_ty) ++ " does not match output state type: " ++ (showSDoc $ ppr outstate_ty)
165 otherwise -> error $ "Return type of top-level function " ++ hsname ++ " must be a two-tuple containing a state and output ports."
167 -- | Splits a tuple type into a list of element types, or Nothing if the type
168 -- is not a tuple type.
170 Type -- ^ The type to split
171 -> Maybe [Type] -- ^ The tuples element types
174 case Type.splitTyConApp_maybe ty of
175 Just (tycon, args) -> if TyCon.isTupleTyCon tycon
182 -- | A consise representation of a (set of) ports on a builtin function
183 type PortMap = HsValueMap (String, AST.TypeMark)
184 -- | A consise representation of a builtin function
185 data BuiltIn = BuiltIn String [PortMap] PortMap
187 -- | Translate a concise representation of a builtin function to something
188 -- that can be put into FuncMap directly.
189 addBuiltIn :: BuiltIn -> VHDLState ()
190 addBuiltIn (BuiltIn name args res) = do
193 hsfunc = HsFunction name (map useAsPort args) (useAsPort res)
197 BuiltIn "hwxor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
198 BuiltIn "hwand" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
199 BuiltIn "hwor" [(Single ("a", VHDL.bit_ty)), (Single ("b", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty)),
200 BuiltIn "hwnot" [(Single ("a", VHDL.bit_ty))] (Single ("o", VHDL.bit_ty))
203 -- vim: set ts=8 sw=2 sts=2 expandtab: