4 import qualified Control.Monad as Monad
5 import qualified Data.Map as Map
7 import qualified Data.Either as Either
12 import qualified ForSyDe.Backend.VHDL.AST as AST
18 import qualified IdInfo
27 -----------------------------------------------------------------------------
28 -- Functions to generate VHDL for builtin functions
29 -----------------------------------------------------------------------------
31 -- | A function to wrap a builder-like function that expects its arguments to
34 (dst -> func -> [AST.Expr] -> res)
35 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
36 genExprArgs wrap dst func args = wrap dst func args'
37 where args' = map (either (varToVHDLExpr.exprToVar) id) args
39 -- | A function to wrap a builder-like function that expects its arguments to
42 (dst -> func -> [Var.Var] -> res)
43 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
44 genVarArgs wrap dst func args = wrap dst func args'
46 args' = map exprToVar exprargs
47 -- Check (rather crudely) that all arguments are CoreExprs
48 (exprargs, []) = Either.partitionEithers args
50 -- | A function to wrap a builder-like function that produces an expression
51 -- and expects it to be assigned to the destination.
53 ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession AST.Expr)
54 -> ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession [AST.ConcSm])
55 genExprRes wrap dst func args = do
56 expr <- wrap dst func args
57 return $ [mkUncondAssign dst expr]
59 -- | Generate a binary operator application. The first argument should be a
60 -- constructor from the AST.Expr type, e.g. AST.And.
61 genOperator2 :: (AST.Expr -> AST.Expr -> AST.Expr) -> BuiltinBuilder
62 genOperator2 op = genExprArgs $ genExprRes (genOperator2' op)
63 genOperator2' :: (AST.Expr -> AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
64 genOperator2' op _ f [arg1, arg2] = return $ op arg1 arg2
66 -- | Generate a unary operator application
67 genOperator1 :: (AST.Expr -> AST.Expr) -> BuiltinBuilder
68 genOperator1 op = genExprArgs $ genExprRes (genOperator1' op)
69 genOperator1' :: (AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
70 genOperator1' op _ f [arg] = return $ op arg
72 -- | Generate a function call from the destination binder, function name and a
73 -- list of expressions (its arguments)
74 genFCall :: BuiltinBuilder
75 genFCall = genExprArgs $ genExprRes genFCall'
76 genFCall' :: Either CoreSyn.CoreBndr AST.VHDLName -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
77 genFCall' (Left res) f args = do
78 let fname = varToString f
79 let el_ty = (tfvec_elem . Var.varType) res
80 id <- vectorFunId el_ty fname
81 return $ AST.PrimFCall $ AST.FCall (AST.NSimple id) $
82 map (\exp -> Nothing AST.:=>: AST.ADExpr exp) args
83 genFCall' (Right name) _ _ = error $ "\nGenerate.genFCall': Cannot generate builtin function call assigned to a VHDLName: " ++ show name
85 -- | Generate a generate statement for the builtin function "map"
86 genMap :: BuiltinBuilder
87 genMap (Left res) f [Left mapped_f, Left (Var arg)] =
88 -- mapped_f must be a CoreExpr (since we can't represent functions as VHDL
89 -- expressions). arg must be a CoreExpr (and should be a CoreSyn.Var), since
90 -- we must index it (which we couldn't if it was a VHDL Expr, since only
91 -- VHDLNames can be indexed).
93 -- Setup the generate scheme
94 len = (tfvec_len . Var.varType) res
95 -- TODO: Use something better than varToString
96 label = mkVHDLExtId ("mapVector" ++ (varToString res))
97 n_id = mkVHDLBasicId "n"
98 n_expr = idToVHDLExpr n_id
99 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
100 genScheme = AST.ForGn n_id range
102 -- Create the content of the generate statement: Applying the mapped_f to
103 -- each of the elements in arg, storing to each element in res
104 resname = mkIndexedName (varToVHDLName res) n_expr
105 argexpr = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg) n_expr
107 let (CoreSyn.Var real_f, already_mapped_args) = CoreSyn.collectArgs mapped_f
108 let valargs = get_val_args (Var.varType real_f) already_mapped_args
109 app_concsms <- genApplication (Right resname) real_f (map Left valargs ++ [Right argexpr])
110 -- Return the generate statement
111 return [AST.CSGSm $ AST.GenerateSm label genScheme [] app_concsms]
113 genMap' (Right name) _ _ = error $ "\nGenerate.genMap': Cannot generate map function call assigned to a VHDLName: " ++ show name
115 genZipWith :: BuiltinBuilder
116 genZipWith = genVarArgs genZipWith'
117 genZipWith' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
118 genZipWith' (Left res) f args@[zipped_f, arg1, arg2] =
120 -- Setup the generate scheme
121 len = (tfvec_len . Var.varType) res
122 -- TODO: Use something better than varToString
123 label = mkVHDLExtId ("zipWithVector" ++ (varToString res))
124 n_id = mkVHDLBasicId "n"
125 n_expr = idToVHDLExpr n_id
126 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
127 genScheme = AST.ForGn n_id range
129 -- Create the content of the generate statement: Applying the zipped_f to
130 -- each of the elements in arg1 and arg2, storing to each element in res
131 resname = mkIndexedName (varToVHDLName res) n_expr
132 argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg1) n_expr
133 argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg2) n_expr
135 app_concsms <- genApplication (Right resname) zipped_f [Right argexpr1, Right argexpr2]
136 -- Return the generate functions
137 return [AST.CSGSm $ AST.GenerateSm label genScheme [] app_concsms]
139 genFoldl :: BuiltinBuilder
140 genFoldl = genFold True
142 genFoldr :: BuiltinBuilder
143 genFoldr = genFold False
145 genFold :: Bool -> BuiltinBuilder
146 genFold left = genVarArgs (genFold' left)
147 genFold' :: Bool -> (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
148 -- Special case for an empty input vector, just assign start to res
149 genFold' left (Left res) _ [_, start, vec] | len == 0 = return [mkUncondAssign (Left res) (varToVHDLExpr start)]
150 where len = (tfvec_len . Var.varType) vec
151 genFold' left (Left res) f [folded_f, start, vec] = do
152 -- evec is (TFVec n), so it still needs an element type
153 let (nvec, _) = splitAppTy (Var.varType vec)
154 -- Put the type of the start value in nvec, this will be the type of our
156 let tmp_ty = Type.mkAppTy nvec (Var.varType start)
157 let error_msg = "\nGenerate.genFold': Can not construct temp vector for element type: " ++ pprString tmp_ty
158 tmp_vhdl_ty <- vhdl_ty error_msg tmp_ty
159 -- Setup the generate scheme
160 let gen_label = mkVHDLExtId ("foldlVector" ++ (varToString vec))
161 let block_label = mkVHDLExtId ("foldlVector" ++ (varToString start))
162 let gen_range = if left then AST.ToRange (AST.PrimLit "0") len_min_expr
163 else AST.DownRange len_min_expr (AST.PrimLit "0")
164 let gen_scheme = AST.ForGn n_id gen_range
165 -- Make the intermediate vector
166 let tmp_dec = AST.BDISD $ AST.SigDec tmp_id tmp_vhdl_ty Nothing
167 -- Create the generate statement
168 cells <- sequence [genFirstCell, genOtherCell]
169 let gen_sm = AST.GenerateSm gen_label gen_scheme [] (map AST.CSGSm cells)
170 -- Assign tmp[len-1] or tmp[0] to res
171 let out_assign = mkUncondAssign (Left res) $ vhdlNameToVHDLExpr (if left then
172 (mkIndexedName tmp_name (AST.PrimLit $ show (len-1))) else
173 (mkIndexedName tmp_name (AST.PrimLit "0")))
174 let block = AST.BlockSm block_label [] (AST.PMapAspect []) [tmp_dec] [AST.CSGSm gen_sm, out_assign]
175 return [AST.CSBSm block]
178 len = (tfvec_len . Var.varType) vec
179 -- An id for the counter
180 n_id = mkVHDLBasicId "n"
181 n_cur = idToVHDLExpr n_id
182 -- An expression for previous n
183 n_prev = if left then (n_cur AST.:-: (AST.PrimLit "1"))
184 else (n_cur AST.:+: (AST.PrimLit "1"))
185 -- An expression for len-1
186 len_min_expr = (AST.PrimLit $ show (len-1))
187 -- An id for the tmp result vector
188 tmp_id = mkVHDLBasicId "tmp"
189 tmp_name = AST.NSimple tmp_id
190 -- Generate parts of the fold
191 genFirstCell, genOtherCell :: VHDLSession AST.GenerateSm
193 let cond_label = mkVHDLExtId "firstcell"
194 -- if n == 0 or n == len-1
195 let cond_scheme = AST.IfGn $ n_cur AST.:=: (if left then (AST.PrimLit "0")
196 else (AST.PrimLit $ show (len-1)))
197 -- Output to tmp[current n]
198 let resname = mkIndexedName tmp_name n_cur
200 let argexpr1 = varToVHDLExpr start
201 -- Input from vec[current n]
202 let argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName vec) n_cur
203 app_concsms <- genApplication (Right resname) folded_f ( if left then
204 [Right argexpr1, Right argexpr2]
206 [Right argexpr2, Right argexpr1]
208 -- Return the conditional generate part
209 return $ AST.GenerateSm cond_label cond_scheme [] app_concsms
212 let cond_label = mkVHDLExtId "othercell"
213 -- if n > 0 or n < len-1
214 let cond_scheme = AST.IfGn $ n_cur AST.:/=: (if left then (AST.PrimLit "0")
215 else (AST.PrimLit $ show (len-1)))
216 -- Output to tmp[current n]
217 let resname = mkIndexedName tmp_name n_cur
218 -- Input from tmp[previous n]
219 let argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName tmp_name n_prev
220 -- Input from vec[current n]
221 let argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName vec) n_cur
222 app_concsms <- genApplication (Right resname) folded_f ( if left then
223 [Right argexpr1, Right argexpr2]
225 [Right argexpr2, Right argexpr1]
227 -- Return the conditional generate part
228 return $ AST.GenerateSm cond_label cond_scheme [] app_concsms
230 -- | Generate a generate statement for the builtin function "zip"
231 genZip :: BuiltinBuilder
232 genZip = genVarArgs genZip'
233 genZip' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
234 genZip' (Left res) f args@[arg1, arg2] =
236 -- Setup the generate scheme
237 len = (tfvec_len . Var.varType) res
238 -- TODO: Use something better than varToString
239 label = mkVHDLExtId ("zipVector" ++ (varToString res))
240 n_id = mkVHDLBasicId "n"
241 n_expr = idToVHDLExpr n_id
242 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
243 genScheme = AST.ForGn n_id range
244 resname' = mkIndexedName (varToVHDLName res) n_expr
245 argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg1) n_expr
246 argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg2) n_expr
248 labels <- getFieldLabels (tfvec_elem (Var.varType res))
249 let resnameA = mkSelectedName resname' (labels!!0)
250 let resnameB = mkSelectedName resname' (labels!!1)
251 let resA_assign = mkUncondAssign (Right resnameA) argexpr1
252 let resB_assign = mkUncondAssign (Right resnameB) argexpr2
253 -- Return the generate functions
254 return [AST.CSGSm $ AST.GenerateSm label genScheme [] [resA_assign,resB_assign]]
256 -- | Generate a generate statement for the builtin function "unzip"
257 genUnzip :: BuiltinBuilder
258 genUnzip = genVarArgs genUnzip'
259 genUnzip' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
260 genUnzip' (Left res) f args@[arg] =
262 -- Setup the generate scheme
263 len = (tfvec_len . Var.varType) arg
264 -- TODO: Use something better than varToString
265 label = mkVHDLExtId ("unzipVector" ++ (varToString res))
266 n_id = mkVHDLBasicId "n"
267 n_expr = idToVHDLExpr n_id
268 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
269 genScheme = AST.ForGn n_id range
270 resname' = varToVHDLName res
271 argexpr' = mkIndexedName (varToVHDLName arg) n_expr
273 reslabels <- getFieldLabels (Var.varType res)
274 arglabels <- getFieldLabels (tfvec_elem (Var.varType arg))
275 let resnameA = mkIndexedName (mkSelectedName resname' (reslabels!!0)) n_expr
276 let resnameB = mkIndexedName (mkSelectedName resname' (reslabels!!1)) n_expr
277 let argexprA = vhdlNameToVHDLExpr $ mkSelectedName argexpr' (arglabels!!0)
278 let argexprB = vhdlNameToVHDLExpr $ mkSelectedName argexpr' (arglabels!!1)
279 let resA_assign = mkUncondAssign (Right resnameA) argexprA
280 let resB_assign = mkUncondAssign (Right resnameB) argexprB
281 -- Return the generate functions
282 return [AST.CSGSm $ AST.GenerateSm label genScheme [] [resA_assign,resB_assign]]
284 genCopy :: BuiltinBuilder
285 genCopy = genVarArgs genCopy'
286 genCopy' :: (Either CoreSyn.CoreBndr AST.VHDLName ) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
287 genCopy' (Left res) f args@[arg] =
289 resExpr = AST.Aggregate [AST.ElemAssoc (Just AST.Others)
290 (AST.PrimName $ (varToVHDLName arg))]
291 out_assign = mkUncondAssign (Left res) resExpr
297 -----------------------------------------------------------------------------
298 -- Function to generate VHDL for applications
299 -----------------------------------------------------------------------------
301 (Either CoreSyn.CoreBndr AST.VHDLName) -- ^ Where to store the result?
302 -> CoreSyn.CoreBndr -- ^ The function to apply
303 -> [Either CoreSyn.CoreExpr AST.Expr] -- ^ The arguments to apply
304 -> VHDLSession [AST.ConcSm] -- ^ The resulting concurrent statements
305 genApplication dst f args =
306 case Var.globalIdVarDetails f of
307 IdInfo.DataConWorkId dc -> case dst of
308 -- It's a datacon. Create a record from its arguments.
310 -- We have the bndr, so we can get at the type
311 labels <- getFieldLabels (Var.varType bndr)
312 return $ zipWith mkassign labels $ map (either exprToVHDLExpr id) args
314 mkassign :: AST.VHDLId -> AST.Expr -> AST.ConcSm
316 let sel_name = mkSelectedName ((either varToVHDLName id) dst) label in
317 mkUncondAssign (Right sel_name) arg
318 Right _ -> error $ "\nGenerate.genApplication: Can't generate dataconstructor application without an original binder"
319 IdInfo.VanillaGlobal -> do
320 -- It's a global value imported from elsewhere. These can be builtin
321 -- functions. Look up the function name in the name table and execute
322 -- the associated builder if there is any and the argument count matches
323 -- (this should always be the case if it typechecks, but just to be
325 case (Map.lookup (varToString f) globalNameTable) of
326 Just (arg_count, builder) ->
327 if length args == arg_count then
330 error $ "\nGenerate.genApplication: Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ show args
331 Nothing -> error $ "\nGenerate.genApplication: Using function from another module that is not a known builtin: " ++ pprString f
332 IdInfo.NotGlobalId -> do
333 signatures <- getA vsSignatures
334 -- This is a local id, so it should be a function whose definition we
335 -- have and which can be turned into a component instantiation.
337 signature = Maybe.fromMaybe
338 (error $ "\nGenerate.genApplication: Using function '" ++ (varToString f) ++ "' without signature? This should not happen!")
339 (Map.lookup f signatures)
340 entity_id = ent_id signature
341 -- TODO: Using show here isn't really pretty, but we'll need some
342 -- unique-ish value...
343 label = "comp_ins_" ++ (either show prettyShow) dst
344 portmaps = mkAssocElems (map (either exprToVHDLExpr id) args) ((either varToVHDLName id) dst) signature
346 return [mkComponentInst label entity_id portmaps]
347 details -> error $ "\nGenerate.genApplication: Calling unsupported function " ++ pprString f ++ " with GlobalIdDetails " ++ pprString details
349 -----------------------------------------------------------------------------
350 -- Functions to generate functions dealing with vectors.
351 -----------------------------------------------------------------------------
353 -- Returns the VHDLId of the vector function with the given name for the given
354 -- element type. Generates -- this function if needed.
355 vectorFunId :: Type.Type -> String -> VHDLSession AST.VHDLId
356 vectorFunId el_ty fname = do
357 let error_msg = "\nGenerate.vectorFunId: Can not construct vector function for element: " ++ pprString el_ty
358 elemTM <- vhdl_ty error_msg el_ty
359 -- TODO: This should not be duplicated from mk_vector_ty. Probably but it in
360 -- the VHDLState or something.
361 let vectorTM = mkVHDLExtId $ "vector_" ++ (AST.fromVHDLId elemTM)
362 typefuns <- getA vsTypeFuns
363 case Map.lookup (OrdType el_ty, fname) typefuns of
364 -- Function already generated, just return it
365 Just (id, _) -> return id
366 -- Function not generated yet, generate it
368 let functions = genUnconsVectorFuns elemTM vectorTM
369 case lookup fname functions of
371 modA vsTypeFuns $ Map.insert (OrdType el_ty, fname) (function_id, (fst body))
372 mapM_ (vectorFunId el_ty) (snd body)
374 Nothing -> error $ "\nGenerate.vectorFunId: I don't know how to generate vector function " ++ fname
376 function_id = mkVHDLExtId fname
378 genUnconsVectorFuns :: AST.TypeMark -- ^ type of the vector elements
379 -> AST.TypeMark -- ^ type of the vector
380 -> [(String, (AST.SubProgBody, [String]))]
381 genUnconsVectorFuns elemTM vectorTM =
382 [ (exId, (AST.SubProgBody exSpec [] [exExpr],[]))
383 , (replaceId, (AST.SubProgBody replaceSpec [AST.SPVD replaceVar] [replaceExpr,replaceRet],[]))
384 , (headId, (AST.SubProgBody headSpec [] [headExpr],[]))
385 , (lastId, (AST.SubProgBody lastSpec [] [lastExpr],[]))
386 , (initId, (AST.SubProgBody initSpec [AST.SPVD initVar] [initExpr, initRet],[]))
387 , (tailId, (AST.SubProgBody tailSpec [AST.SPVD tailVar] [tailExpr, tailRet],[]))
388 , (takeId, (AST.SubProgBody takeSpec [AST.SPVD takeVar] [takeExpr, takeRet],[]))
389 , (dropId, (AST.SubProgBody dropSpec [AST.SPVD dropVar] [dropExpr, dropRet],[]))
390 , (plusgtId, (AST.SubProgBody plusgtSpec [AST.SPVD plusgtVar] [plusgtExpr, plusgtRet],[]))
391 , (emptyId, (AST.SubProgBody emptySpec [AST.SPCD emptyVar] [emptyExpr],[]))
392 , (singletonId, (AST.SubProgBody singletonSpec [AST.SPVD singletonVar] [singletonRet],[]))
393 , (copynId, (AST.SubProgBody copynSpec [AST.SPVD copynVar] [copynExpr],[]))
394 , (selId, (AST.SubProgBody selSpec [AST.SPVD selVar] [selFor, selRet],[]))
395 , (ltplusId, (AST.SubProgBody ltplusSpec [AST.SPVD ltplusVar] [ltplusExpr, ltplusRet],[]))
396 , (plusplusId, (AST.SubProgBody plusplusSpec [AST.SPVD plusplusVar] [plusplusExpr, plusplusRet],[]))
397 , (lengthTId, (AST.SubProgBody lengthTSpec [] [lengthTExpr],[]))
398 , (shiftlId, (AST.SubProgBody shiftlSpec [AST.SPVD shiftlVar] [shiftlExpr, shiftlRet], [initId]))
399 , (shiftrId, (AST.SubProgBody shiftrSpec [AST.SPVD shiftrVar] [shiftrExpr, shiftrRet], [tailId]))
400 , (nullId, (AST.SubProgBody nullSpec [] [nullExpr], []))
401 , (rotlId, (AST.SubProgBody rotlSpec [AST.SPVD rotlVar] [rotlExpr, rotlRet], [nullId, lastId, initId]))
402 , (rotrId, (AST.SubProgBody rotrSpec [AST.SPVD rotrVar] [rotrExpr, rotrRet], [nullId, tailId, headId]))
405 ixPar = AST.unsafeVHDLBasicId "ix"
406 vecPar = AST.unsafeVHDLBasicId "vec"
407 vec1Par = AST.unsafeVHDLBasicId "vec1"
408 vec2Par = AST.unsafeVHDLBasicId "vec2"
409 nPar = AST.unsafeVHDLBasicId "n"
410 iId = AST.unsafeVHDLBasicId "i"
412 aPar = AST.unsafeVHDLBasicId "a"
413 fPar = AST.unsafeVHDLBasicId "f"
414 sPar = AST.unsafeVHDLBasicId "s"
415 resId = AST.unsafeVHDLBasicId "res"
416 exSpec = AST.Function (mkVHDLExtId exId) [AST.IfaceVarDec vecPar vectorTM,
417 AST.IfaceVarDec ixPar naturalTM] elemTM
418 exExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NIndexed
419 (AST.IndexedName (AST.NSimple vecPar) [AST.PrimName $
421 replaceSpec = AST.Function (mkVHDLExtId replaceId) [ AST.IfaceVarDec vecPar vectorTM
422 , AST.IfaceVarDec iPar naturalTM
423 , AST.IfaceVarDec aPar elemTM
425 -- variable res : fsvec_x (0 to vec'length-1);
428 (AST.SubtypeIn vectorTM
429 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
430 [AST.ToRange (AST.PrimLit "0")
431 (AST.PrimName (AST.NAttribute $
432 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
433 (AST.PrimLit "1")) ]))
435 -- res AST.:= vec(0 to i-1) & a & vec(i+1 to length'vec-1)
436 replaceExpr = AST.NSimple resId AST.:=
437 (vecSlice (AST.PrimLit "0") (AST.PrimName (AST.NSimple iPar) AST.:-: AST.PrimLit "1") AST.:&:
438 AST.PrimName (AST.NSimple aPar) AST.:&:
439 vecSlice (AST.PrimName (AST.NSimple iPar) AST.:+: AST.PrimLit "1")
440 ((AST.PrimName (AST.NAttribute $
441 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
442 AST.:-: AST.PrimLit "1"))
443 replaceRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
444 vecSlice init last = AST.PrimName (AST.NSlice
447 (AST.ToRange init last)))
448 headSpec = AST.Function (mkVHDLExtId headId) [AST.IfaceVarDec vecPar vectorTM] elemTM
450 headExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
451 (AST.NSimple vecPar) [AST.PrimLit "0"])))
452 lastSpec = AST.Function (mkVHDLExtId lastId) [AST.IfaceVarDec vecPar vectorTM] elemTM
453 -- return vec(vec'length-1);
454 lastExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
456 [AST.PrimName (AST.NAttribute $
457 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
458 AST.:-: AST.PrimLit "1"])))
459 initSpec = AST.Function (mkVHDLExtId initId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
460 -- variable res : fsvec_x (0 to vec'length-2);
463 (AST.SubtypeIn vectorTM
464 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
465 [AST.ToRange (AST.PrimLit "0")
466 (AST.PrimName (AST.NAttribute $
467 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
468 (AST.PrimLit "2")) ]))
470 -- resAST.:= vec(0 to vec'length-2)
471 initExpr = AST.NSimple resId AST.:= (vecSlice
473 (AST.PrimName (AST.NAttribute $
474 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
475 AST.:-: AST.PrimLit "2"))
476 initRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
477 tailSpec = AST.Function (mkVHDLExtId tailId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
478 -- variable res : fsvec_x (0 to vec'length-2);
481 (AST.SubtypeIn vectorTM
482 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
483 [AST.ToRange (AST.PrimLit "0")
484 (AST.PrimName (AST.NAttribute $
485 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
486 (AST.PrimLit "2")) ]))
488 -- res AST.:= vec(1 to vec'length-1)
489 tailExpr = AST.NSimple resId AST.:= (vecSlice
491 (AST.PrimName (AST.NAttribute $
492 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
493 AST.:-: AST.PrimLit "1"))
494 tailRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
495 takeSpec = AST.Function (mkVHDLExtId takeId) [AST.IfaceVarDec nPar naturalTM,
496 AST.IfaceVarDec vecPar vectorTM ] vectorTM
497 -- variable res : fsvec_x (0 to n-1);
500 (AST.SubtypeIn vectorTM
501 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
502 [AST.ToRange (AST.PrimLit "0")
503 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
504 (AST.PrimLit "1")) ]))
506 -- res AST.:= vec(0 to n-1)
507 takeExpr = AST.NSimple resId AST.:=
508 (vecSlice (AST.PrimLit "1")
509 (AST.PrimName (AST.NSimple $ nPar) AST.:-: AST.PrimLit "1"))
510 takeRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
511 dropSpec = AST.Function (mkVHDLExtId dropId) [AST.IfaceVarDec nPar naturalTM,
512 AST.IfaceVarDec vecPar vectorTM ] vectorTM
513 -- variable res : fsvec_x (0 to vec'length-n-1);
516 (AST.SubtypeIn vectorTM
517 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
518 [AST.ToRange (AST.PrimLit "0")
519 (AST.PrimName (AST.NAttribute $
520 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
521 (AST.PrimName $ AST.NSimple nPar)AST.:-: (AST.PrimLit "1")) ]))
523 -- res AST.:= vec(n to vec'length-1)
524 dropExpr = AST.NSimple resId AST.:= (vecSlice
525 (AST.PrimName $ AST.NSimple nPar)
526 (AST.PrimName (AST.NAttribute $
527 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
528 AST.:-: AST.PrimLit "1"))
529 dropRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
530 plusgtSpec = AST.Function (mkVHDLExtId plusgtId) [AST.IfaceVarDec aPar elemTM,
531 AST.IfaceVarDec vecPar vectorTM] vectorTM
532 -- variable res : fsvec_x (0 to vec'length);
535 (AST.SubtypeIn vectorTM
536 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
537 [AST.ToRange (AST.PrimLit "0")
538 (AST.PrimName (AST.NAttribute $
539 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
541 plusgtExpr = AST.NSimple resId AST.:=
542 ((AST.PrimName $ AST.NSimple aPar) AST.:&:
543 (AST.PrimName $ AST.NSimple vecPar))
544 plusgtRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
545 emptySpec = AST.Function (mkVHDLExtId emptyId) [] vectorTM
548 (AST.SubtypeIn vectorTM Nothing)
549 (Just $ AST.PrimLit "\"\"")
550 emptyExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
551 singletonSpec = AST.Function (mkVHDLExtId singletonId) [AST.IfaceVarDec aPar elemTM ]
553 -- variable res : fsvec_x (0 to 0) := (others => a);
556 (AST.SubtypeIn vectorTM
557 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
558 [AST.ToRange (AST.PrimLit "0") (AST.PrimLit "0")]))
559 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
560 (AST.PrimName $ AST.NSimple aPar)])
561 singletonRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
562 copynSpec = AST.Function (mkVHDLExtId copynId) [AST.IfaceVarDec nPar naturalTM,
563 AST.IfaceVarDec aPar elemTM ] vectorTM
564 -- variable res : fsvec_x (0 to n-1) := (others => a);
567 (AST.SubtypeIn vectorTM
568 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
569 [AST.ToRange (AST.PrimLit "0")
570 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
571 (AST.PrimLit "1")) ]))
572 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
573 (AST.PrimName $ AST.NSimple aPar)])
575 copynExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
576 selSpec = AST.Function (mkVHDLExtId selId) [AST.IfaceVarDec fPar naturalTM,
577 AST.IfaceVarDec sPar naturalTM,
578 AST.IfaceVarDec nPar naturalTM,
579 AST.IfaceVarDec vecPar vectorTM ] vectorTM
580 -- variable res : fsvec_x (0 to n-1);
583 (AST.SubtypeIn vectorTM
584 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
585 [AST.ToRange (AST.PrimLit "0")
586 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
587 (AST.PrimLit "1")) ])
590 -- for i res'range loop
591 -- res(i) := vec(f+i*s);
593 selFor = AST.ForSM iId (AST.AttribRange $ AST.AttribName (AST.NSimple resId) rangeId Nothing) [selAssign]
594 -- res(i) := vec(f+i*s);
595 selAssign = let origExp = AST.PrimName (AST.NSimple fPar) AST.:+:
596 (AST.PrimName (AST.NSimple iId) AST.:*:
597 AST.PrimName (AST.NSimple sPar)) in
598 AST.NIndexed (AST.IndexedName (AST.NSimple resId) [AST.PrimName (AST.NSimple iId)]) AST.:=
599 (AST.PrimName $ AST.NIndexed (AST.IndexedName (AST.NSimple vecPar) [origExp]))
601 selRet = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
602 ltplusSpec = AST.Function (mkVHDLExtId ltplusId) [AST.IfaceVarDec vecPar vectorTM,
603 AST.IfaceVarDec aPar elemTM] vectorTM
604 -- variable res : fsvec_x (0 to vec'length);
607 (AST.SubtypeIn vectorTM
608 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
609 [AST.ToRange (AST.PrimLit "0")
610 (AST.PrimName (AST.NAttribute $
611 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
613 ltplusExpr = AST.NSimple resId AST.:=
614 ((AST.PrimName $ AST.NSimple vecPar) AST.:&:
615 (AST.PrimName $ AST.NSimple aPar))
616 ltplusRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
617 plusplusSpec = AST.Function (mkVHDLExtId plusplusId) [AST.IfaceVarDec vec1Par vectorTM,
618 AST.IfaceVarDec vec2Par vectorTM]
620 -- variable res : fsvec_x (0 to vec1'length + vec2'length -1);
623 (AST.SubtypeIn vectorTM
624 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
625 [AST.ToRange (AST.PrimLit "0")
626 (AST.PrimName (AST.NAttribute $
627 AST.AttribName (AST.NSimple vec1Par) (mkVHDLBasicId lengthId) Nothing) AST.:+:
628 AST.PrimName (AST.NAttribute $
629 AST.AttribName (AST.NSimple vec2Par) (mkVHDLBasicId lengthId) Nothing) AST.:-:
632 plusplusExpr = AST.NSimple resId AST.:=
633 ((AST.PrimName $ AST.NSimple vec1Par) AST.:&:
634 (AST.PrimName $ AST.NSimple vec2Par))
635 plusplusRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
636 lengthTSpec = AST.Function (mkVHDLExtId lengthTId) [AST.IfaceVarDec vecPar vectorTM] naturalTM
637 lengthTExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NAttribute $
638 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
639 shiftlSpec = AST.Function (mkVHDLExtId shiftlId) [AST.IfaceVarDec vecPar vectorTM,
640 AST.IfaceVarDec aPar elemTM ] vectorTM
641 -- variable res : fsvec_x (0 to vec'length-1);
644 (AST.SubtypeIn vectorTM
645 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
646 [AST.ToRange (AST.PrimLit "0")
647 (AST.PrimName (AST.NAttribute $
648 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
649 (AST.PrimLit "1")) ]))
651 -- res := a & init(vec)
652 shiftlExpr = AST.NSimple resId AST.:=
653 (AST.PrimName (AST.NSimple aPar) AST.:&:
654 (AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId initId))
655 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)]))
656 shiftlRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
657 shiftrSpec = AST.Function (mkVHDLExtId shiftrId) [AST.IfaceVarDec vecPar vectorTM,
658 AST.IfaceVarDec aPar elemTM ] vectorTM
659 -- variable res : fsvec_x (0 to vec'length-1);
662 (AST.SubtypeIn vectorTM
663 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
664 [AST.ToRange (AST.PrimLit "0")
665 (AST.PrimName (AST.NAttribute $
666 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
667 (AST.PrimLit "1")) ]))
669 -- res := tail(vec) & a
670 shiftrExpr = AST.NSimple resId AST.:=
671 ((AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId tailId))
672 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)]) AST.:&:
673 (AST.PrimName (AST.NSimple aPar)))
675 shiftrRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
676 nullSpec = AST.Function (mkVHDLExtId nullId) [AST.IfaceVarDec vecPar vectorTM] booleanTM
677 -- return vec'length = 0
678 nullExpr = AST.ReturnSm (Just $
679 AST.PrimName (AST.NAttribute $
680 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:=:
682 rotlSpec = AST.Function (mkVHDLExtId rotlId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
683 -- variable res : fsvec_x (0 to vec'length-1);
686 (AST.SubtypeIn vectorTM
687 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
688 [AST.ToRange (AST.PrimLit "0")
689 (AST.PrimName (AST.NAttribute $
690 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
691 (AST.PrimLit "1")) ]))
693 -- if null(vec) then res := vec else res := last(vec) & init(vec)
694 rotlExpr = AST.IfSm (AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId nullId))
695 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)])
696 [AST.NSimple resId AST.:= (AST.PrimName $ AST.NSimple vecPar)]
698 (Just $ AST.Else [rotlExprRet])
700 AST.NSimple resId AST.:=
701 ((AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId lastId))
702 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)]) AST.:&:
703 (AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId initId))
704 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)]))
705 rotlRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
706 rotrSpec = AST.Function (mkVHDLExtId rotrId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
707 -- variable res : fsvec_x (0 to vec'length-1);
710 (AST.SubtypeIn vectorTM
711 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
712 [AST.ToRange (AST.PrimLit "0")
713 (AST.PrimName (AST.NAttribute $
714 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
715 (AST.PrimLit "1")) ]))
717 -- if null(vec) then res := vec else res := tail(vec) & head(vec)
718 rotrExpr = AST.IfSm (AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId nullId))
719 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)])
720 [AST.NSimple resId AST.:= (AST.PrimName $ AST.NSimple vecPar)]
722 (Just $ AST.Else [rotrExprRet])
724 AST.NSimple resId AST.:=
725 ((AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId tailId))
726 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)]) AST.:&:
727 (AST.PrimFCall $ AST.FCall (AST.NSimple (mkVHDLExtId headId))
728 [Nothing AST.:=>: AST.ADExpr (AST.PrimName $ AST.NSimple vecPar)]))
729 rotrRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
730 -----------------------------------------------------------------------------
731 -- A table of builtin functions
732 -----------------------------------------------------------------------------
734 -- | The builtin functions we support. Maps a name to an argument count and a
736 globalNameTable :: NameTable
737 globalNameTable = Map.fromList
738 [ (exId , (2, genFCall ) )
739 , (replaceId , (3, genFCall ) )
740 , (headId , (1, genFCall ) )
741 , (lastId , (1, genFCall ) )
742 , (tailId , (1, genFCall ) )
743 , (initId , (1, genFCall ) )
744 , (takeId , (2, genFCall ) )
745 , (dropId , (2, genFCall ) )
746 , (selId , (4, genFCall ) )
747 , (plusgtId , (2, genFCall ) )
748 , (ltplusId , (2, genFCall ) )
749 , (plusplusId , (2, genFCall ) )
750 , (mapId , (2, genMap ) )
751 , (zipWithId , (3, genZipWith ) )
752 , (foldlId , (3, genFoldl ) )
753 , (foldrId , (3, genFoldr ) )
754 , (zipId , (2, genZip ) )
755 , (unzipId , (1, genUnzip ) )
756 , (shiftlId , (2, genFCall ) )
757 , (shiftrId , (2, genFCall ) )
758 , (rotlId , (1, genFCall ) )
759 , (rotrId , (1, genFCall ) )
760 , (emptyId , (0, genFCall ) )
761 , (singletonId , (1, genFCall ) )
762 , (copynId , (2, genFCall ) )
763 , (copyId , (1, genCopy ) )
764 , (lengthTId , (1, genFCall ) )
765 , (nullId , (1, genFCall ) )
766 , (hwxorId , (2, genOperator2 AST.Xor ) )
767 , (hwandId , (2, genOperator2 AST.And ) )
768 , (hworId , (2, genOperator2 AST.Or ) )
769 , (hwnotId , (1, genOperator1 AST.Not ) )