4 import qualified Control.Monad as Monad
5 import qualified Data.Map as Map
7 import qualified Data.Either as Either
12 import qualified ForSyDe.Backend.VHDL.AST as AST
18 import qualified IdInfo
27 -----------------------------------------------------------------------------
28 -- Functions to generate VHDL for builtin functions
29 -----------------------------------------------------------------------------
31 -- | A function to wrap a builder-like function that expects its arguments to
34 (dst -> func -> [AST.Expr] -> res)
35 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
36 genExprArgs wrap dst func args = wrap dst func args'
37 where args' = map (either (varToVHDLExpr.exprToVar) id) args
39 -- | A function to wrap a builder-like function that expects its arguments to
42 (dst -> func -> [Var.Var] -> res)
43 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
44 genVarArgs wrap dst func args = wrap dst func args'
46 args' = map exprToVar exprargs
47 -- Check (rather crudely) that all arguments are CoreExprs
48 (exprargs, []) = Either.partitionEithers args
50 -- | A function to wrap a builder-like function that produces an expression
51 -- and expects it to be assigned to the destination.
53 ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession AST.Expr)
54 -> ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession [AST.ConcSm])
55 genExprRes wrap dst func args = do
56 expr <- wrap dst func args
57 return $ [mkUncondAssign dst expr]
59 -- | Generate a binary operator application. The first argument should be a
60 -- constructor from the AST.Expr type, e.g. AST.And.
61 genOperator2 :: (AST.Expr -> AST.Expr -> AST.Expr) -> BuiltinBuilder
62 genOperator2 op = genExprArgs $ genExprRes (genOperator2' op)
63 genOperator2' :: (AST.Expr -> AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
64 genOperator2' op _ f [arg1, arg2] = return $ op arg1 arg2
66 -- | Generate a unary operator application
67 genOperator1 :: (AST.Expr -> AST.Expr) -> BuiltinBuilder
68 genOperator1 op = genExprArgs $ genExprRes (genOperator1' op)
69 genOperator1' :: (AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
70 genOperator1' op _ f [arg] = return $ op arg
72 -- | Generate a function call from the destination binder, function name and a
73 -- list of expressions (its arguments)
74 genFCall :: BuiltinBuilder
75 genFCall = genExprArgs $ genExprRes genFCall'
76 genFCall' :: Either CoreSyn.CoreBndr AST.VHDLName -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
77 genFCall' (Left res) f args = do
78 let fname = varToString f
79 let el_ty = (tfvec_elem . Var.varType) res
80 id <- vectorFunId el_ty fname
81 return $ AST.PrimFCall $ AST.FCall (AST.NSimple id) $
82 map (\exp -> Nothing AST.:=>: AST.ADExpr exp) args
83 genFCall' (Right name) _ _ = error $ "\nGenerate.genFCall': Cannot generate builtin function call assigned to a VHDLName: " ++ show name
85 -- | Generate a generate statement for the builtin function "map"
86 genMap :: BuiltinBuilder
87 genMap (Left res) f [Left mapped_f, Left (Var arg)] =
88 -- mapped_f must be a CoreExpr (since we can't represent functions as VHDL
89 -- expressions). arg must be a CoreExpr (and should be a CoreSyn.Var), since
90 -- we must index it (which we couldn't if it was a VHDL Expr, since only
91 -- VHDLNames can be indexed).
93 -- Setup the generate scheme
94 len = (tfvec_len . Var.varType) res
95 -- TODO: Use something better than varToString
96 label = mkVHDLExtId ("mapVector" ++ (varToString res))
97 n_id = mkVHDLBasicId "n"
98 n_expr = idToVHDLExpr n_id
99 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
100 genScheme = AST.ForGn n_id range
102 -- Create the content of the generate statement: Applying the mapped_f to
103 -- each of the elements in arg, storing to each element in res
104 resname = mkIndexedName (varToVHDLName res) n_expr
105 argexpr = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg) n_expr
107 let (CoreSyn.Var real_f, already_mapped_args) = CoreSyn.collectArgs mapped_f
108 let valargs = get_val_args (Var.varType real_f) already_mapped_args
109 app_concsms <- genApplication (Right resname) real_f (map Left valargs ++ [Right argexpr])
110 -- Return the generate statement
111 return [AST.CSGSm $ AST.GenerateSm label genScheme [] app_concsms]
113 genMap' (Right name) _ _ = error $ "\nGenerate.genMap': Cannot generate map function call assigned to a VHDLName: " ++ show name
115 genZipWith :: BuiltinBuilder
116 genZipWith = genVarArgs genZipWith'
117 genZipWith' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
118 genZipWith' (Left res) f args@[zipped_f, arg1, arg2] =
120 -- Setup the generate scheme
121 len = (tfvec_len . Var.varType) res
122 -- TODO: Use something better than varToString
123 label = mkVHDLExtId ("zipWithVector" ++ (varToString res))
124 n_id = mkVHDLBasicId "n"
125 n_expr = idToVHDLExpr n_id
126 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
127 genScheme = AST.ForGn n_id range
129 -- Create the content of the generate statement: Applying the zipped_f to
130 -- each of the elements in arg1 and arg2, storing to each element in res
131 resname = mkIndexedName (varToVHDLName res) n_expr
132 argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg1) n_expr
133 argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg2) n_expr
135 app_concsms <- genApplication (Right resname) zipped_f [Right argexpr1, Right argexpr2]
136 -- Return the generate functions
137 return [AST.CSGSm $ AST.GenerateSm label genScheme [] app_concsms]
139 genFoldl :: BuiltinBuilder
140 genFoldl = genFold True
142 genFoldr :: BuiltinBuilder
143 genFoldr = genFold False
145 genFold :: Bool -> BuiltinBuilder
146 genFold left = genVarArgs (genFold' left)
147 genFold' :: Bool -> (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
148 -- Special case for an empty input vector, just assign start to res
149 genFold' left (Left res) _ [_, start, vec] | len == 0 = return [mkUncondAssign (Left res) (varToVHDLExpr start)]
150 where len = (tfvec_len . Var.varType) vec
151 genFold' left (Left res) f [folded_f, start, vec] = do
152 -- evec is (TFVec n), so it still needs an element type
153 let (nvec, _) = splitAppTy (Var.varType vec)
154 -- Put the type of the start value in nvec, this will be the type of our
156 let tmp_ty = Type.mkAppTy nvec (Var.varType start)
157 let error_msg = "\nGenerate.genFold': Can not construct temp vector for element type: " ++ pprString tmp_ty
158 tmp_vhdl_ty <- vhdl_ty error_msg tmp_ty
159 -- Setup the generate scheme
160 let gen_label = mkVHDLExtId ("foldlVector" ++ (varToString vec))
161 let block_label = mkVHDLExtId ("foldlVector" ++ (varToString start))
162 let gen_range = if left then AST.ToRange (AST.PrimLit "0") len_min_expr
163 else AST.DownRange len_min_expr (AST.PrimLit "0")
164 let gen_scheme = AST.ForGn n_id gen_range
165 -- Make the intermediate vector
166 let tmp_dec = AST.BDISD $ AST.SigDec tmp_id tmp_vhdl_ty Nothing
167 -- Create the generate statement
168 cells <- sequence [genFirstCell, genOtherCell]
169 let gen_sm = AST.GenerateSm gen_label gen_scheme [] (map AST.CSGSm cells)
170 -- Assign tmp[len-1] or tmp[0] to res
171 let out_assign = mkUncondAssign (Left res) $ vhdlNameToVHDLExpr (if left then
172 (mkIndexedName tmp_name (AST.PrimLit $ show (len-1))) else
173 (mkIndexedName tmp_name (AST.PrimLit "0")))
174 let block = AST.BlockSm block_label [] (AST.PMapAspect []) [tmp_dec] [AST.CSGSm gen_sm, out_assign]
175 return [AST.CSBSm block]
178 len = (tfvec_len . Var.varType) vec
179 -- An id for the counter
180 n_id = mkVHDLBasicId "n"
181 n_cur = idToVHDLExpr n_id
182 -- An expression for previous n
183 n_prev = if left then (n_cur AST.:-: (AST.PrimLit "1"))
184 else (n_cur AST.:+: (AST.PrimLit "1"))
185 -- An expression for len-1
186 len_min_expr = (AST.PrimLit $ show (len-1))
187 -- An id for the tmp result vector
188 tmp_id = mkVHDLBasicId "tmp"
189 tmp_name = AST.NSimple tmp_id
190 -- Generate parts of the fold
191 genFirstCell, genOtherCell :: VHDLSession AST.GenerateSm
193 let cond_label = mkVHDLExtId "firstcell"
194 -- if n == 0 or n == len-1
195 let cond_scheme = AST.IfGn $ n_cur AST.:=: (if left then (AST.PrimLit "0")
196 else (AST.PrimLit $ show (len-1)))
197 -- Output to tmp[current n]
198 let resname = mkIndexedName tmp_name n_cur
200 let argexpr1 = varToVHDLExpr start
201 -- Input from vec[current n]
202 let argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName vec) n_cur
203 app_concsms <- genApplication (Right resname) folded_f ( if left then
204 [Right argexpr1, Right argexpr2]
206 [Right argexpr2, Right argexpr1]
208 -- Return the conditional generate part
209 return $ AST.GenerateSm cond_label cond_scheme [] app_concsms
212 let cond_label = mkVHDLExtId "othercell"
213 -- if n > 0 or n < len-1
214 let cond_scheme = AST.IfGn $ n_cur AST.:/=: (if left then (AST.PrimLit "0")
215 else (AST.PrimLit $ show (len-1)))
216 -- Output to tmp[current n]
217 let resname = mkIndexedName tmp_name n_cur
218 -- Input from tmp[previous n]
219 let argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName tmp_name n_prev
220 -- Input from vec[current n]
221 let argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName vec) n_cur
222 app_concsms <- genApplication (Right resname) folded_f ( if left then
223 [Right argexpr1, Right argexpr2]
225 [Right argexpr2, Right argexpr1]
227 -- Return the conditional generate part
228 return $ AST.GenerateSm cond_label cond_scheme [] app_concsms
230 -- | Generate a generate statement for the builtin function "zip"
231 genZip :: BuiltinBuilder
232 genZip = genVarArgs genZip'
233 genZip' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
234 genZip' (Left res) f args@[arg1, arg2] =
236 -- Setup the generate scheme
237 len = (tfvec_len . Var.varType) res
238 -- TODO: Use something better than varToString
239 label = mkVHDLExtId ("zipVector" ++ (varToString res))
240 n_id = mkVHDLBasicId "n"
241 n_expr = idToVHDLExpr n_id
242 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
243 genScheme = AST.ForGn n_id range
244 resname' = mkIndexedName (varToVHDLName res) n_expr
245 argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg1) n_expr
246 argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg2) n_expr
248 labels <- getFieldLabels (tfvec_elem (Var.varType res))
249 let resnameA = mkSelectedName resname' (labels!!0)
250 let resnameB = mkSelectedName resname' (labels!!1)
251 let resA_assign = mkUncondAssign (Right resnameA) argexpr1
252 let resB_assign = mkUncondAssign (Right resnameB) argexpr2
253 -- Return the generate functions
254 return [AST.CSGSm $ AST.GenerateSm label genScheme [] [resA_assign,resB_assign]]
256 -- | Generate a generate statement for the builtin function "unzip"
257 genUnzip :: BuiltinBuilder
258 genUnzip = genVarArgs genUnzip'
259 genUnzip' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
260 genUnzip' (Left res) f args@[arg] =
262 -- Setup the generate scheme
263 len = (tfvec_len . Var.varType) arg
264 -- TODO: Use something better than varToString
265 label = mkVHDLExtId ("unzipVector" ++ (varToString res))
266 n_id = mkVHDLBasicId "n"
267 n_expr = idToVHDLExpr n_id
268 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
269 genScheme = AST.ForGn n_id range
270 resname' = varToVHDLName res
271 argexpr' = mkIndexedName (varToVHDLName arg) n_expr
273 reslabels <- getFieldLabels (Var.varType res)
274 arglabels <- getFieldLabels (tfvec_elem (Var.varType arg))
275 let resnameA = mkIndexedName (mkSelectedName resname' (reslabels!!0)) n_expr
276 let resnameB = mkIndexedName (mkSelectedName resname' (reslabels!!1)) n_expr
277 let argexprA = vhdlNameToVHDLExpr $ mkSelectedName argexpr' (arglabels!!0)
278 let argexprB = vhdlNameToVHDLExpr $ mkSelectedName argexpr' (arglabels!!1)
279 let resA_assign = mkUncondAssign (Right resnameA) argexprA
280 let resB_assign = mkUncondAssign (Right resnameB) argexprB
281 -- Return the generate functions
282 return [AST.CSGSm $ AST.GenerateSm label genScheme [] [resA_assign,resB_assign]]
284 genCopy :: BuiltinBuilder
285 genCopy = genVarArgs genCopy'
286 genCopy' :: (Either CoreSyn.CoreBndr AST.VHDLName ) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
287 genCopy' (Left res) f args@[arg] =
289 resExpr = AST.Aggregate [AST.ElemAssoc (Just AST.Others)
290 (AST.PrimName $ (varToVHDLName arg))]
291 out_assign = mkUncondAssign (Left res) resExpr
297 -----------------------------------------------------------------------------
298 -- Function to generate VHDL for applications
299 -----------------------------------------------------------------------------
301 (Either CoreSyn.CoreBndr AST.VHDLName) -- ^ Where to store the result?
302 -> CoreSyn.CoreBndr -- ^ The function to apply
303 -> [Either CoreSyn.CoreExpr AST.Expr] -- ^ The arguments to apply
304 -> VHDLSession [AST.ConcSm] -- ^ The resulting concurrent statements
305 genApplication dst f args =
306 case Var.globalIdVarDetails f of
307 IdInfo.DataConWorkId dc -> case dst of
308 -- It's a datacon. Create a record from its arguments.
310 -- We have the bndr, so we can get at the type
311 labels <- getFieldLabels (Var.varType bndr)
312 return $ zipWith mkassign labels $ map (either exprToVHDLExpr id) args
314 mkassign :: AST.VHDLId -> AST.Expr -> AST.ConcSm
316 let sel_name = mkSelectedName ((either varToVHDLName id) dst) label in
317 mkUncondAssign (Right sel_name) arg
318 Right _ -> error $ "\nGenerate.genApplication: Can't generate dataconstructor application without an original binder"
319 IdInfo.VanillaGlobal -> do
320 -- It's a global value imported from elsewhere. These can be builtin
321 -- functions. Look up the function name in the name table and execute
322 -- the associated builder if there is any and the argument count matches
323 -- (this should always be the case if it typechecks, but just to be
325 case (Map.lookup (varToString f) globalNameTable) of
326 Just (arg_count, builder) ->
327 if length args == arg_count then
330 error $ "\nGenerate.genApplication: Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ show args
331 Nothing -> error $ "\nGenerate.genApplication: Using function from another module that is not a known builtin: " ++ pprString f
332 IdInfo.NotGlobalId -> do
333 signatures <- getA vsSignatures
334 -- This is a local id, so it should be a function whose definition we
335 -- have and which can be turned into a component instantiation.
337 signature = Maybe.fromMaybe
338 (error $ "\nGenerate.genApplication: Using function '" ++ (varToString f) ++ "' without signature? This should not happen!")
339 (Map.lookup f signatures)
340 entity_id = ent_id signature
341 -- TODO: Using show here isn't really pretty, but we'll need some
342 -- unique-ish value...
343 label = "comp_ins_" ++ (either show prettyShow) dst
344 portmaps = mkAssocElems (map (either exprToVHDLExpr id) args) ((either varToVHDLName id) dst) signature
346 return [mkComponentInst label entity_id portmaps]
347 details -> error $ "\nGenerate.genApplication: Calling unsupported function " ++ pprString f ++ " with GlobalIdDetails " ++ pprString details
349 -----------------------------------------------------------------------------
350 -- Functions to generate functions dealing with vectors.
351 -----------------------------------------------------------------------------
353 -- Returns the VHDLId of the vector function with the given name for the given
354 -- element type. Generates -- this function if needed.
355 vectorFunId :: Type.Type -> String -> VHDLSession AST.VHDLId
356 vectorFunId el_ty fname = do
357 let error_msg = "\nGenerate.vectorFunId: Can not construct vector function for element: " ++ pprString el_ty
358 elemTM <- vhdl_ty error_msg el_ty
359 -- TODO: This should not be duplicated from mk_vector_ty. Probably but it in
360 -- the VHDLState or something.
361 let vectorTM = mkVHDLExtId $ "vector_" ++ (AST.fromVHDLId elemTM)
362 typefuns <- getA vsTypeFuns
363 case Map.lookup (OrdType el_ty, fname) typefuns of
364 -- Function already generated, just return it
365 Just (id, _) -> return id
366 -- Function not generated yet, generate it
368 let functions = genUnconsVectorFuns elemTM vectorTM
369 case lookup fname functions of
371 modA vsTypeFuns $ Map.insert (OrdType el_ty, fname) (function_id, body)
373 Nothing -> error $ "\nGenerate.vectorFunId: I don't know how to generate vector function " ++ fname
375 function_id = mkVHDLExtId fname
377 genUnconsVectorFuns :: AST.TypeMark -- ^ type of the vector elements
378 -> AST.TypeMark -- ^ type of the vector
379 -> [(String, AST.SubProgBody)]
380 genUnconsVectorFuns elemTM vectorTM =
381 [ (exId, AST.SubProgBody exSpec [] [exExpr])
382 , (replaceId, AST.SubProgBody replaceSpec [AST.SPVD replaceVar] [replaceExpr,replaceRet])
383 , (headId, AST.SubProgBody headSpec [] [headExpr])
384 , (lastId, AST.SubProgBody lastSpec [] [lastExpr])
385 , (initId, AST.SubProgBody initSpec [AST.SPVD initVar] [initExpr, initRet])
386 , (tailId, AST.SubProgBody tailSpec [AST.SPVD tailVar] [tailExpr, tailRet])
387 , (takeId, AST.SubProgBody takeSpec [AST.SPVD takeVar] [takeExpr, takeRet])
388 , (dropId, AST.SubProgBody dropSpec [AST.SPVD dropVar] [dropExpr, dropRet])
389 , (plusgtId, AST.SubProgBody plusgtSpec [AST.SPVD plusgtVar] [plusgtExpr, plusgtRet])
390 , (emptyId, AST.SubProgBody emptySpec [AST.SPCD emptyVar] [emptyExpr])
391 , (singletonId, AST.SubProgBody singletonSpec [AST.SPVD singletonVar] [singletonRet])
392 , (copynId, AST.SubProgBody copynSpec [AST.SPVD copynVar] [copynExpr])
393 , (selId, AST.SubProgBody selSpec [AST.SPVD selVar] [selFor, selRet])
394 , (ltplusId, AST.SubProgBody ltplusSpec [AST.SPVD ltplusVar] [ltplusExpr, ltplusRet] )
395 , (plusplusId, AST.SubProgBody plusplusSpec [AST.SPVD plusplusVar] [plusplusExpr, plusplusRet])
396 , (lengthTId, AST.SubProgBody lengthTSpec [] [lengthTExpr])
399 ixPar = AST.unsafeVHDLBasicId "ix"
400 vecPar = AST.unsafeVHDLBasicId "vec"
401 vec1Par = AST.unsafeVHDLBasicId "vec1"
402 vec2Par = AST.unsafeVHDLBasicId "vec2"
403 nPar = AST.unsafeVHDLBasicId "n"
404 iId = AST.unsafeVHDLBasicId "i"
406 aPar = AST.unsafeVHDLBasicId "a"
407 fPar = AST.unsafeVHDLBasicId "f"
408 sPar = AST.unsafeVHDLBasicId "s"
409 resId = AST.unsafeVHDLBasicId "res"
410 exSpec = AST.Function (mkVHDLExtId exId) [AST.IfaceVarDec vecPar vectorTM,
411 AST.IfaceVarDec ixPar naturalTM] elemTM
412 exExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NIndexed
413 (AST.IndexedName (AST.NSimple vecPar) [AST.PrimName $
415 replaceSpec = AST.Function (mkVHDLExtId replaceId) [ AST.IfaceVarDec vecPar vectorTM
416 , AST.IfaceVarDec iPar naturalTM
417 , AST.IfaceVarDec aPar elemTM
419 -- variable res : fsvec_x (0 to vec'length-1);
422 (AST.SubtypeIn vectorTM
423 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
424 [AST.ToRange (AST.PrimLit "0")
425 (AST.PrimName (AST.NAttribute $
426 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
427 (AST.PrimLit "1")) ]))
429 -- res AST.:= vec(0 to i-1) & a & vec(i+1 to length'vec-1)
430 replaceExpr = AST.NSimple resId AST.:=
431 (vecSlice (AST.PrimLit "0") (AST.PrimName (AST.NSimple iPar) AST.:-: AST.PrimLit "1") AST.:&:
432 AST.PrimName (AST.NSimple aPar) AST.:&:
433 vecSlice (AST.PrimName (AST.NSimple iPar) AST.:+: AST.PrimLit "1")
434 ((AST.PrimName (AST.NAttribute $
435 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
436 AST.:-: AST.PrimLit "1"))
437 replaceRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
438 vecSlice init last = AST.PrimName (AST.NSlice
441 (AST.ToRange init last)))
442 headSpec = AST.Function (mkVHDLExtId headId) [AST.IfaceVarDec vecPar vectorTM] elemTM
444 headExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
445 (AST.NSimple vecPar) [AST.PrimLit "0"])))
446 lastSpec = AST.Function (mkVHDLExtId lastId) [AST.IfaceVarDec vecPar vectorTM] elemTM
447 -- return vec(vec'length-1);
448 lastExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
450 [AST.PrimName (AST.NAttribute $
451 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
452 AST.:-: AST.PrimLit "1"])))
453 initSpec = AST.Function (mkVHDLExtId initId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
454 -- variable res : fsvec_x (0 to vec'length-2);
457 (AST.SubtypeIn vectorTM
458 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
459 [AST.ToRange (AST.PrimLit "0")
460 (AST.PrimName (AST.NAttribute $
461 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
462 (AST.PrimLit "2")) ]))
464 -- resAST.:= vec(0 to vec'length-2)
465 initExpr = AST.NSimple resId AST.:= (vecSlice
467 (AST.PrimName (AST.NAttribute $
468 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
469 AST.:-: AST.PrimLit "2"))
470 initRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
471 tailSpec = AST.Function (mkVHDLExtId tailId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
472 -- variable res : fsvec_x (0 to vec'length-2);
475 (AST.SubtypeIn vectorTM
476 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
477 [AST.ToRange (AST.PrimLit "0")
478 (AST.PrimName (AST.NAttribute $
479 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
480 (AST.PrimLit "2")) ]))
482 -- res AST.:= vec(1 to vec'length-1)
483 tailExpr = AST.NSimple resId AST.:= (vecSlice
485 (AST.PrimName (AST.NAttribute $
486 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
487 AST.:-: AST.PrimLit "1"))
488 tailRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
489 takeSpec = AST.Function (mkVHDLExtId takeId) [AST.IfaceVarDec nPar naturalTM,
490 AST.IfaceVarDec vecPar vectorTM ] vectorTM
491 -- variable res : fsvec_x (0 to n-1);
494 (AST.SubtypeIn vectorTM
495 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
496 [AST.ToRange (AST.PrimLit "0")
497 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
498 (AST.PrimLit "1")) ]))
500 -- res AST.:= vec(0 to n-1)
501 takeExpr = AST.NSimple resId AST.:=
502 (vecSlice (AST.PrimLit "1")
503 (AST.PrimName (AST.NSimple $ nPar) AST.:-: AST.PrimLit "1"))
504 takeRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
505 dropSpec = AST.Function (mkVHDLExtId dropId) [AST.IfaceVarDec nPar naturalTM,
506 AST.IfaceVarDec vecPar vectorTM ] vectorTM
507 -- variable res : fsvec_x (0 to vec'length-n-1);
510 (AST.SubtypeIn vectorTM
511 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
512 [AST.ToRange (AST.PrimLit "0")
513 (AST.PrimName (AST.NAttribute $
514 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
515 (AST.PrimName $ AST.NSimple nPar)AST.:-: (AST.PrimLit "1")) ]))
517 -- res AST.:= vec(n to vec'length-1)
518 dropExpr = AST.NSimple resId AST.:= (vecSlice
519 (AST.PrimName $ AST.NSimple nPar)
520 (AST.PrimName (AST.NAttribute $
521 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
522 AST.:-: AST.PrimLit "1"))
523 dropRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
524 plusgtSpec = AST.Function (mkVHDLExtId plusgtId) [AST.IfaceVarDec aPar elemTM,
525 AST.IfaceVarDec vecPar vectorTM] vectorTM
526 -- variable res : fsvec_x (0 to vec'length);
529 (AST.SubtypeIn vectorTM
530 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
531 [AST.ToRange (AST.PrimLit "0")
532 (AST.PrimName (AST.NAttribute $
533 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
535 plusgtExpr = AST.NSimple resId AST.:=
536 ((AST.PrimName $ AST.NSimple aPar) AST.:&:
537 (AST.PrimName $ AST.NSimple vecPar))
538 plusgtRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
539 emptySpec = AST.Function (mkVHDLExtId emptyId) [] vectorTM
542 (AST.SubtypeIn vectorTM Nothing)
543 (Just $ AST.PrimLit "\"\"")
544 emptyExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
545 singletonSpec = AST.Function (mkVHDLExtId singletonId) [AST.IfaceVarDec aPar elemTM ]
547 -- variable res : fsvec_x (0 to 0) := (others => a);
550 (AST.SubtypeIn vectorTM
551 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
552 [AST.ToRange (AST.PrimLit "0") (AST.PrimLit "0")]))
553 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
554 (AST.PrimName $ AST.NSimple aPar)])
555 singletonRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
556 copynSpec = AST.Function (mkVHDLExtId copynId) [AST.IfaceVarDec nPar naturalTM,
557 AST.IfaceVarDec aPar elemTM ] vectorTM
558 -- variable res : fsvec_x (0 to n-1) := (others => a);
561 (AST.SubtypeIn vectorTM
562 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
563 [AST.ToRange (AST.PrimLit "0")
564 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
565 (AST.PrimLit "1")) ]))
566 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
567 (AST.PrimName $ AST.NSimple aPar)])
569 copynExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
570 selSpec = AST.Function (mkVHDLExtId selId) [AST.IfaceVarDec fPar naturalTM,
571 AST.IfaceVarDec sPar naturalTM,
572 AST.IfaceVarDec nPar naturalTM,
573 AST.IfaceVarDec vecPar vectorTM ] vectorTM
574 -- variable res : fsvec_x (0 to n-1);
577 (AST.SubtypeIn vectorTM
578 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
579 [AST.ToRange (AST.PrimLit "0")
580 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
581 (AST.PrimLit "1")) ])
584 -- for i res'range loop
585 -- res(i) := vec(f+i*s);
587 selFor = AST.ForSM iId (AST.AttribRange $ AST.AttribName (AST.NSimple resId) rangeId Nothing) [selAssign]
588 -- res(i) := vec(f+i*s);
589 selAssign = let origExp = AST.PrimName (AST.NSimple fPar) AST.:+:
590 (AST.PrimName (AST.NSimple iId) AST.:*:
591 AST.PrimName (AST.NSimple sPar)) in
592 AST.NIndexed (AST.IndexedName (AST.NSimple resId) [AST.PrimName (AST.NSimple iId)]) AST.:=
593 (AST.PrimName $ AST.NIndexed (AST.IndexedName (AST.NSimple vecPar) [origExp]))
595 selRet = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
596 ltplusSpec = AST.Function (mkVHDLExtId ltplusId) [AST.IfaceVarDec vecPar vectorTM,
597 AST.IfaceVarDec aPar elemTM] vectorTM
598 -- variable res : fsvec_x (0 to vec'length);
601 (AST.SubtypeIn vectorTM
602 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
603 [AST.ToRange (AST.PrimLit "0")
604 (AST.PrimName (AST.NAttribute $
605 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
607 ltplusExpr = AST.NSimple resId AST.:=
608 ((AST.PrimName $ AST.NSimple vecPar) AST.:&:
609 (AST.PrimName $ AST.NSimple aPar))
610 ltplusRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
611 plusplusSpec = AST.Function (mkVHDLExtId plusplusId) [AST.IfaceVarDec vec1Par vectorTM,
612 AST.IfaceVarDec vec2Par vectorTM]
614 -- variable res : fsvec_x (0 to vec1'length + vec2'length -1);
617 (AST.SubtypeIn vectorTM
618 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
619 [AST.ToRange (AST.PrimLit "0")
620 (AST.PrimName (AST.NAttribute $
621 AST.AttribName (AST.NSimple vec1Par) (mkVHDLBasicId lengthId) Nothing) AST.:+:
622 AST.PrimName (AST.NAttribute $
623 AST.AttribName (AST.NSimple vec2Par) (mkVHDLBasicId lengthId) Nothing) AST.:-:
626 plusplusExpr = AST.NSimple resId AST.:=
627 ((AST.PrimName $ AST.NSimple vec1Par) AST.:&:
628 (AST.PrimName $ AST.NSimple vec2Par))
629 plusplusRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
630 lengthTSpec = AST.Function (mkVHDLExtId lengthTId) [AST.IfaceVarDec vecPar vectorTM] naturalTM
631 lengthTExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NAttribute $
632 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
634 -----------------------------------------------------------------------------
635 -- A table of builtin functions
636 -----------------------------------------------------------------------------
638 -- | The builtin functions we support. Maps a name to an argument count and a
640 globalNameTable :: NameTable
641 globalNameTable = Map.fromList
642 [ (exId , (2, genFCall ) )
643 , (replaceId , (3, genFCall ) )
644 , (headId , (1, genFCall ) )
645 , (lastId , (1, genFCall ) )
646 , (tailId , (1, genFCall ) )
647 , (initId , (1, genFCall ) )
648 , (takeId , (2, genFCall ) )
649 , (dropId , (2, genFCall ) )
650 , (selId , (4, genFCall ) )
651 , (plusgtId , (2, genFCall ) )
652 , (ltplusId , (2, genFCall ) )
653 , (plusplusId , (2, genFCall ) )
654 , (mapId , (2, genMap ) )
655 , (zipWithId , (3, genZipWith ) )
656 , (foldlId , (3, genFoldl ) )
657 , (foldrId , (3, genFoldr ) )
658 , (zipId , (2, genZip ) )
659 , (unzipId , (1, genUnzip ) )
660 , (emptyId , (0, genFCall ) )
661 , (singletonId , (1, genFCall ) )
662 , (copynId , (2, genFCall ) )
663 , (copyId , (1, genCopy ) )
664 , (lengthTId , (1, genFCall ) )
665 , (hwxorId , (2, genOperator2 AST.Xor ) )
666 , (hwandId , (2, genOperator2 AST.And ) )
667 , (hworId , (2, genOperator2 AST.Or ) )
668 , (hwnotId , (1, genOperator1 AST.Not ) )