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matthijs/master-project/cλash.git
2009-01-29
Matthijs Kooijman
Make full_adder simpler.
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2009-01-29
Matthijs Kooijman
Improve error message for createSignalAssignments.
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2009-01-29
Matthijs Kooijman
Learn ExpandExpr how to handle simple case expressions.
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2009-01-29
Matthijs Kooijman
Add a base case to splitTupleConstructorArgs.
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2009-01-29
Matthijs Kooijman
Learn expandExpr how to handle tuple construction.
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2009-01-29
Matthijs Kooijman
Add a duplication hardware model.
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2009-01-29
Matthijs Kooijman
Implement expandArgs in terms of expandExpr.
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2009-01-29
Matthijs Kooijman
Add a double invertor model.
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2009-01-29
Matthijs Kooijman
Learn expandExpr how to expand Application.
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2009-01-29
Matthijs Kooijman
Let expandExpr error out on unsupported expressions.
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2009-01-29
Matthijs Kooijman
Add an invertor hardware model.
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2009-01-29
Matthijs Kooijman
Rework the VHDL generation to be more bottom up.
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2009-01-29
Matthijs Kooijman
Add a trivial "wire" hardware model.
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2009-01-29
Matthijs Kooijman
Rename PortNameMap to SignalNameMap and make it a depen...
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2009-01-29
Matthijs Kooijman
Move around some functionality.
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2009-01-29
Matthijs Kooijman
Reorder and comment things a bit.
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2009-01-29
Matthijs Kooijman
Use uniqueName to make component instantiations unique.
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2009-01-29
Matthijs Kooijman
Add a uniqueName function.
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2009-01-29
Matthijs Kooijman
Add some comments.
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2009-01-27
Matthijs Kooijman
Use spaces instead of tabs.
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2009-01-27
Matthijs Kooijman
Put getInstantiations in the State monad.
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2009-01-27
Matthijs Kooijman
Put getArchitecture inside the State monad.
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2009-01-27
Matthijs Kooijman
Make the state monad calling code more pretty.
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2009-01-27
Matthijs Kooijman
Run mkHWFunction and addFunc in a State monad.
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2009-01-27
Matthijs Kooijman
Derive Show for the data types we define.
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2009-01-22
Matthijs Kooijman
Remove the Args constructor, just use a list instead.
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2009-01-22
Matthijs Kooijman
Look up the port names in the session when generating...
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2009-01-22
Matthijs Kooijman
Generate a HWFunction for the function that is being...
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2009-01-22
Matthijs Kooijman
Lookup input port names for instantiations in the session.
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2009-01-22
Matthijs Kooijman
Make getPortMapEntry accept a PortNameMap.
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2009-01-22
Matthijs Kooijman
Pass around a session variable.
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2009-01-22
Matthijs Kooijman
Use ForSyDe.Backend.VHDL modules to generate VHDL.
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2009-01-22
Matthijs Kooijman
Remove the entity generation code.
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2009-01-21
Matthijs Kooijman
Handle tuple constructors in expressions.
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2009-01-21
Matthijs Kooijman
Let the Adders module export everything.
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2009-01-21
Matthijs Kooijman
Add a haskell model for a half adder.
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2009-01-21
Matthijs Kooijman
Add an error message.
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2009-01-21
Matthijs Kooijman
Map output ports as well as input ports.
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2009-01-21
Matthijs Kooijman
Generate input port names from the argument types.
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2009-01-19
Matthijs Kooijman
Add .gitignore file.
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2009-01-19
Matthijs Kooijman
Intial import of some haskell programs.
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