Merge branch 'cλash' of http://git.stderr.nl/matthijs/projects/master-project

* 'cλash' of http://git.stderr.nl/matthijs/projects/master-project:
  Add another higher order testcase, highordtest2.
  Support VHDL generation for two-alternative cases.

Conflicts:
	Translator.hs

diff --cc Adders.hs
index ebc1c8c4f0ee45aa6a3975bbeb46d99fe0c04fd3,d4dbbf8c99d851b5c7cf7b49222ca994b42c8878..4b18e393504e7844be495b748a4c3143180e9f24
--- 1/Adders.hs
--- 2/Adders.hs
+++ b/Adders.hs
@@@ -143,37 -137,44 +143,47 @@@ instance Inv (BitVec D0) wher
  -- Any number of bits adder
  -- Recursive version
  -- [a] -> [b] -> ([s], cout)
 -rec_adder :: ([Bit], [Bit]) -> ([Bit], Bit)
 -
 -rec_adder ([], []) = ([], Low)
 -rec_adder ((a:as), (b:bs)) = 
 -  (s : rest, cout)
 -  where
 -    (rest, cin) = rec_adder (as, bs)
 -    (s, cout) = full_adder (a, b, cin)
 -
 -foo = id
 -add, sub :: Int -> Int -> Int
 -add a b = a + b
 -sub a b = a - b
 -
 -highordtest = \x ->
 -  let s = foo x
 -  in
 -     case s of
 -       (a, b) ->
 -         case a of
 -           High -> add
 -           Low -> let
 -             op' = case b of
 -                High -> sub
 -                Low -> \c d -> c
 -             in
 -                \c d -> op' d c
 +-- rec_adder :: ([Bit], [Bit]) -> ([Bit], Bit)
 +-- 
 +-- rec_adder ([], []) = ([], Low)
 +-- rec_adder ((a:as), (b:bs)) = 
 +--   (s : rest, cout)
 +--   where
 +--     (rest, cin) = rec_adder (as, bs)
 +--     (s, cout) = full_adder (a, b, cin)
 +-- 
 +-- foo = id
 +-- add, sub :: Int -> Int -> Int
 +-- add a b = a + b
 +-- sub a b = a - b
 +-- 
 +-- highordtest = \x ->
 +--   let s = foo x
 +--   in
 +--      case s of
 +--        (a, b) ->
 +--          case a of
 +--            High -> add
 +--            Low -> let
 +--              op' = case b of
 +--                 High -> sub
 +--                 Low -> \c d -> c
 +--              in
 +--                 \c d -> op' d c
 +
 +functiontest :: TFVec D4 Bit -> Bit
 +functiontest = \v -> let r = head v in r
  
+ highordtest2 = \a b ->
+          case a of
+            High -> \c d -> d
+            Low -> let
+              op' :: Bit -> Bit -> Bit
+              op' = case b of
+                 High -> \c d -> d
+                 Low -> \c d -> c
+              in
+                 \c d -> op' d c
  -- Four bit adder, using the continous adder below
  -- [a] -> [b] -> ([s], cout)
  --con_adder_4 as bs = 

diff --cc Translator.hs
Simple merge

diff --cc VHDL.hs
Simple merge