Always import IEEE.std_logic_1164 in the generated VHDL.

diff --git a/VHDL.hs b/VHDL.hs
index 5d57bb574c98fe55f51e041306e42ccabfcf6950..ad4736471bbf8798d06c6c49c21509fb9d5e4442 100644 (file)
--- a/VHDL.hs
+++ b/VHDL.hs
@@ -26,8 +26,11 @@ getDesignFile = do
   -- session.
   funcs <- getFuncs
   let units = concat $ map getLibraryUnits funcs
+  let context = [
+        AST.Library $ mkVHDLId "IEEE",
+        AST.Use $ (AST.NSimple $ mkVHDLId "IEEE.std_logic_1164") AST.:.: AST.All]
   return $ AST.DesignFile 
-    []
+    context
     units
   
 -- | Create an entity for a given function