Vertically center the register output port.

diff --git a/Utils/Metapost.tex b/Utils/Metapost.tex
index fd213853c371e59537f859d5780cbb5a7bf77a6d..63b0620bd7b2556fa4bfec26aa8e378e10bee277 100644 (file)
--- a/Utils/Metapost.tex
+++ b/Utils/Metapost.tex
@@ -50,7 +50,8 @@ vardef newReg@#(expr v) text options=
       "xpart @#out = xpart @#e",
       "xpart @#d = xpart @#ck = xpart @#w",
     fi
-    "ypart @#d = ypart @#out = ypart (@#sw * .25 + @#nw * .75)",
+    "ypart @#out = ypart midpoint(@#n, @#s)",
+    "ypart @#d = ypart (@#sw * .25 + @#nw * .75)",
     "ypart @#ck = ypart (@#sw * .75 + @#nw * .25)";
 
   StandardTies;