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Generate proper VHDL for top level bindings with no arguments.
authorMatthijs Kooijman <m.kooijman@student.utwente.nl>
Mon, 13 Jul 2009 09:57:25 +0000 (11:57 +0200)
committerMatthijs Kooijman <m.kooijman@student.utwente.nl>
Mon, 13 Jul 2009 09:57:25 +0000 (11:57 +0200)
commit46f93616d6a7ef012c5f07698d56372881196015
tree5c90ee571383dba6cc0ee66ca93ef8690614402atree | snapshot
parent969bf6e8931f58606a1d8bfe288539ded8369553commit | diff
Generate proper VHDL for top level bindings with no arguments.

Previously, a = b bindings would always generate an unconditional
assignment. Now, they use genApplication to generate VHDL, and
genApplications knows how to generate unconditional assignments when b is
a local identifier, and a component instantiation when b is a top level
binder.
Generate.hs diff | blob | history
VHDL.hs diff | blob | history
The Cλash compiler