CLaSH is now CAES Language for Synchronous Hardware

[matthijs/master-project/final-presentation.git] / christiaan / reductioncircuit.lhs

diff --git a/christiaan/reductioncircuit.lhs b/christiaan/reductioncircuit.lhs
index a4f55f68bea1383d702e07144c09deb06f590ae0..e1add22cc3c0aa6be5413f56c3aca5f3111ed606 100644 (file)
--- a/christiaan/reductioncircuit.lhs
+++ b/christiaan/reductioncircuit.lhs
@@ -1,4 +1,4 @@
-\section{Restrictions}
+\subsection{Restrictions}
 %include talk.fmt
 \frame{
 \frametitle{Too Restrictive?}
@@ -15,7 +15,7 @@
 \end{itemize}
 }
 
-\section{Reduction circuit}
+\subsection{Reduction circuit}
 
 \frame{
 \frametitle{Reduction Circuit}
@@ -95,7 +95,7 @@ fifo :: (State (Fifo {..})) (inp, shift) =
   \item Map all vectors to RAMs:
   \begin{itemize}
     \item Store length separately, extra logic
-    \item What happens if size exceeds size of 1 blockRAM?
+    \item What happens if size of the vector exceeds size of the size of the RAM?
   \end{itemize}
   \item Translate to (shift/circular) Buffers
   \begin{itemize}