Generate a VHDL architecture for each function.

[matthijs/master-project/cλash.git] / Translator.hs

diff --git a/Translator.hs b/Translator.hs
index 78c3a6f08be46eec78cde6662c6e0c73c9ed85c9..7e66b181a2f72aef2d22c33e470d645c486fa1d8 100644 (file)
--- a/Translator.hs
+++ b/Translator.hs
@@ -70,6 +70,7 @@ main =
       mapM processBind binds
       modFuncs nameFlatFunction
       modFuncs VHDL.createEntity
+      modFuncs VHDL.createArchitecture
       -- Extract the library units generated from all the functions in the
       -- session.
       funcs <- getFuncs