-clock cycles. The current abstraction of state and time limits the
-descriptions to synchronous hardware, there however is room within the
-language to eventually add a different abstraction mechanism that will allow
-for the modeling of asynchronous systems. Many functional hardware description
-model signals as a stream of all values over time; state is then modeled as a
-delay on this stream of values. The approach taken in this research is to make
-the current state of a circuit part of the input of the function and the
-updated state part of the output.
+clock cycles. Many functional hardware description model signals as a stream
+of all values over time; state is then modeled as a delay on this stream of
+values. The approach taken in this research is to make the current state of a
+circuit part of the input of the function and the updated state part of the
+output. The current abstraction of state and time limits the descriptions to
+synchronous hardware, there however is room within the language to eventually
+add a different abstraction mechanism that will allow for the modeling of
+asynchronous systems.