7 %% http://www.michaelshell.org/
8 %% for current contact information.
10 %% This is a skeleton file demonstrating the use of IEEEtran.cls
11 %% (requires IEEEtran.cls version 1.7 or later) with an IEEE conference paper.
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42 %% File list of work: IEEEtran.cls, IEEEtran_HOWTO.pdf, bare_adv.tex,
43 %% bare_conf.tex, bare_jrnl.tex, bare_jrnl_compsoc.tex
44 %%*************************************************************************
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48 % *** with production work. IEEE's font choices can trigger bugs that do ***
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50 % The testflow support page is at:
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62 % Also note that the "draftcls" or "draftclsnofoot", not "draft", option
63 % should be used if it is desired that the figures are to be displayed in
66 \documentclass[conference,pdf,a4paper,10pt,final,twoside,twocolumn]{IEEEtran}
67 % Add the compsoc option for Computer Society conferences.
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70 % manually specify the path to it like:
71 % \documentclass[conference]{../sty/IEEEtran}
73 % Some very useful LaTeX packages include:
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76 % *** MISC UTILITY PACKAGES ***
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159 % You can find documentation about the pdfTeX application at:
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234 % IEEEtran contains the IEEEeqnarray family of commands that can be used to
235 % generate multiline equations as well as matrices, tables, etc., of high
239 %\usepackage{eqparbox}
240 % Also of notable interest is Scott Pakin's eqparbox package for creating
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243 % http://www.ctan.org/tex-archive/macros/latex/contrib/eqparbox/
249 % *** SUBFIGURE PACKAGES ***
250 %\usepackage[tight,footnotesize]{subfigure}
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252 % easy to put subfigures in your figures. e.g., "Figure 1a and 1b". For IEEE
253 % work, it is a good idea to load it with the tight package option to reduce
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258 % subfigure.sty has been superceeded by subfig.sty.
262 %\usepackage[caption=false]{caption}
263 %\usepackage[font=footnotesize]{subfig}
264 % subfig.sty, also written by Steven Douglas Cochran, is the modern
265 % replacement for subfigure.sty. However, subfig.sty requires and
266 % automatically loads Axel Sommerfeldt's caption.sty which will override
267 % IEEEtran.cls handling of captions and this will result in nonIEEE style
268 % figure/table captions. To prevent this problem, be sure and preload
269 % caption.sty with its "caption=false" package option. This is will preserve
270 % IEEEtran.cls handing of captions. Version 1.3 (2005/06/28) and later
271 % (recommended due to many improvements over 1.2) of subfig.sty supports
272 % the caption=false option directly:
273 %\usepackage[caption=false,font=footnotesize]{subfig}
275 % The latest version and documentation can be obtained at:
276 % http://www.ctan.org/tex-archive/macros/latex/contrib/subfig/
277 % The latest version and documentation of caption.sty can be obtained at:
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283 % *** FLOAT PACKAGES ***
285 %\usepackage{fixltx2e}
286 % fixltx2e, the successor to the earlier fix2col.sty, was written by
287 % Frank Mittelbach and David Carlisle. This package corrects a few problems
288 % in the LaTeX2e kernel, the most notable of which is that in current
289 % LaTeX2e releases, the ordering of single and double column floats is not
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291 % single column figure to be placed prior to an earlier double column
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293 % http://www.ctan.org/tex-archive/macros/latex/base/
297 %\usepackage{stfloats}
298 % stfloats.sty was written by Sigitas Tolusis. This package gives LaTeX2e
299 % the ability to do double column floats at the bottom of the page as well
300 % as the top. (e.g., "\begin{figure*}[!b]" is not normally possible in
301 % LaTeX2e). It also provides a command:
303 % to enable the placement of footnotes below bottom floats (the standard
304 % LaTeX2e kernel puts them above bottom floats). This is an invasive package
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312 % IEEE should note that IEEE rarely uses double column equations and
313 % that authors should try to avoid such use. Do not be tempted to use the
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315 % not format its papers in such ways.
321 % *** PDF, URL AND HYPERLINK PACKAGES ***
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328 % Read the url.sty source comments for usage information. Basically,
335 % *** Do not adjust lengths that control margins, column widths, etc. ***
336 % *** Do not use packages that alter fonts (such as pslatex). ***
337 % There should be no need to do such things with IEEEtran.cls V1.6 and later.
338 % (Unless specifically asked to do so by the journal or conference you plan
339 % to submit to, of course. )
341 % correct bad hyphenation here
342 \hyphenation{op-tical net-works semi-conduc-tor}
344 % Macro for certain acronyms in small caps. Doesn't work with the
345 % default font, though (it contains no smallcaps it seems).
346 \def\VHDL{\textsc{vhdl}}
347 \def\GHC{\textsc{ghc}}
348 \def\CLaSH{\textsc{C$\lambda$aSH}}
350 % Macro for pretty printing haskell snippets. Just monospaced for now, perhaps
351 % we'll get something more complex later on.
352 \def\hs#1{\texttt{#1}}
353 \def\quote#1{``{#1}"}
358 % can use linebreaks \\ within to get better formatting as desired
359 \title{\CLaSH: Structural Descriptions \\ of Synchronous Hardware using Haskell}
362 % author names and affiliations
363 % use a multiple column layout for up to three different
365 \author{\IEEEauthorblockN{Christiaan P.R. Baaij, Matthijs Kooijman, Jan Kuper, Marco E.T. Gerards, Bert Molenkamp, Sabih H. Gerez}
366 \IEEEauthorblockA{University of Twente, Department of EEMCS\\
367 P.O. Box 217, 7500 AE, Enschede, The Netherlands\\
368 c.p.r.baaij@utwente.nl, matthijs@stdin.nl}}
370 % \IEEEauthorblockN{Homer Simpson}
371 % \IEEEauthorblockA{Twentieth Century Fox\\
373 % Email: homer@thesimpsons.com}
375 % \IEEEauthorblockN{James Kirk\\ and Montgomery Scott}
376 % \IEEEauthorblockA{Starfleet Academy\\
377 % San Francisco, California 96678-2391\\
378 % Telephone: (800) 555--1212\\
379 % Fax: (888) 555--1212}}
381 % conference papers do not typically use \thanks and this command
382 % is locked out in conference mode. If really needed, such as for
383 % the acknowledgment of grants, issue a \IEEEoverridecommandlockouts
384 % after \documentclass
386 % for over three affiliations, or if they all won't fit within the width
387 % of the page, use this alternative format:
389 %\author{\IEEEauthorblockN{Michael Shell\IEEEauthorrefmark{1},
390 %Homer Simpson\IEEEauthorrefmark{2},
391 %James Kirk\IEEEauthorrefmark{3},
392 %Montgomery Scott\IEEEauthorrefmark{3} and
393 %Eldon Tyrell\IEEEauthorrefmark{4}}
394 %\IEEEauthorblockA{\IEEEauthorrefmark{1}School of Electrical and Computer Engineering\\
395 %Georgia Institute of Technology,
396 %Atlanta, Georgia 30332--0250\\ Email: see http://www.michaelshell.org/contact.html}
397 %\IEEEauthorblockA{\IEEEauthorrefmark{2}Twentieth Century Fox, Springfield, USA\\
398 %Email: homer@thesimpsons.com}
399 %\IEEEauthorblockA{\IEEEauthorrefmark{3}Starfleet Academy, San Francisco, California 96678-2391\\
400 %Telephone: (800) 555--1212, Fax: (888) 555--1212}
401 %\IEEEauthorblockA{\IEEEauthorrefmark{4}Tyrell Inc., 123 Replicant Street, Los Angeles, California 90210--4321}}
406 % use for special paper notices
407 %\IEEEspecialpapernotice{(Invited Paper)}
412 % make the title area
418 The abstract goes here.
420 % IEEEtran.cls defaults to using nonbold math in the Abstract.
421 % This preserves the distinction between vectors and scalars. However,
422 % if the conference you are submitting to favors bold math in the abstract,
423 % then you can use LaTeX's standard command \boldmath at the very start
424 % of the abstract to achieve this. Many IEEE journals/conferences frown on
425 % math in the abstract anyway.
432 % For peer review papers, you can put extra information on the cover
434 % \ifCLASSOPTIONpeerreview
435 % \begin{center} \bfseries EDICS Category: 3-BBND \end{center}
438 % For peerreview papers, this IEEEtran command inserts a page break and
439 % creates the second title. It will be ignored for other modes.
440 \IEEEpeerreviewmaketitle
443 \section{Introduction}
444 Hardware description languages has allowed the productivity of hardware engineers to keep pace with the development of chip technology. Standard Hardware description languages, like \VHDL\ and Verilog, allowed an engineer to describe circuits using a programming language. These standard languages are very good at describing detailed hardware properties such as timing behavior, but are generally cumbersome in expressing higher-level abstractions. These languages also tend to have a complex syntax and a lack of formal semantics. To overcome these complexities, and raise the abstraction level, a great number of approaches based on functional languages has been proposed \cite{T-Ruby,Hydra,HML2,Hawk1,Lava,ForSyDe1,Wired,reFLect}. The idea of using functional languages started in the early 1980s \cite{Cardelli1981,muFP,DAISY,FHDL}, a time which also saw the birth of the currently popular hardware description languages such as \VHDL.
446 What gives functional languages as hardware description languages their merits is the fact that basic combinatorial circuits are equivalent to mathematical function, and that functional languages lend themselves very well to describe and compose these mathematical functions.
448 \section{Hardware description in Haskell}
450 To translate Haskell to hardware, every Haskell construct needs a
451 translation to \VHDL. There are often multiple valid translations
452 possible. When faced with choices, the most obvious choice has been
453 chosen wherever possible. In a lot of cases, when a programmer looks
454 at a functional hardware description it is completely clear what
455 hardware is described. We want our translator to generate exactly that
456 hardware whenever possible, to make working with \CLaSH\ as intuitive as
459 \subsection{Function application}
460 The basic syntactic elements of a functional program are functions
461 and function application. These have a single obvious \VHDL\
462 translation: each top level function becomes a hardware component,
463 where each argument is an input port and the result value is the
464 (single) output port. This output port can have a complex type (such
465 as a tuple), so having just a single output port does not pose a
468 Each function application in turn becomes component instantiation.
469 Here, the result of each argument expression is assigned to a
470 signal, which is mapped to the corresponding input port. The output
471 port of the function is also mapped to a signal, which is used as
472 the result of the application.
474 Since every top level function generates its own component, the
475 hierarchy of of function calls is reflected in the final \VHDL\
476 output as well, creating a hierarchical \VHDL\ description of the
477 hardware. This separation in different components makes the
478 resulting \VHDL\ output easier to read and debug.
481 Although describing components and connections allows us to describe
482 a lot of hardware designs already, there is an obvious thing
483 missing: choice. We need some way to be able to choose between
484 values based on another value. In Haskell, choice is achieved by
485 \hs{case} expressions, \hs{if} expressions, pattern matching and
488 However, to be able to describe our hardware in a more convenient
489 way, we also want to translate Haskell's choice mechanisms. The
490 easiest of these are of course case expressions (and \hs{if}
491 expressions, which can be very directly translated to \hs{case}
492 expressions). A \hs{case} expression can in turn simply be
493 translated to a conditional assignment, where the conditions use
494 equality comparisons against the constructors in the \hs{case}
497 A slightly more complex (but very powerful) form of choice is
498 pattern matching. A function can be defined in multiple clauses,
499 where each clause specifies a pattern. When the arguments match the
500 pattern, the corresponding clause will be used.
503 Translation of two most basic functional concepts has been
504 discussed: function application and choice. Before looking further
505 into less obvious concepts like higher-order expressions and
506 polymorphism, the possible types that can be used in hardware
507 descriptions will be discussed.
509 Some way is needed to translate every values used to its hardware
510 equivalents. In particular, this means a hardware equivalent for
511 every \emph{type} used in a hardware description is needed
513 Since most functional languages have a lot of standard types that
514 are hard to translate (integers without a fixed size, lists without
515 a static length, etc.), a number of \quote{built-in} types will be
516 defined first. These types are built-in in the sense that our
517 compiler will have a fixed VHDL type for these. User defined types,
518 on the other hand, will have their hardware type derived directly
519 from their Haskell declaration automatically, according to the rules
522 \subsection{Built-in types}
523 The language currently supports the following built-in types. Of these,
524 only the \hs{Bool} type is supported by Haskell out of the box (the
525 others are defined by the \CLaSH\ package, so they are user-defined types
526 from Haskell's point of view).
530 This is the most basic type available. It is mapped directly onto
531 the \texttt{std\_logic} \VHDL\ type. Mapping this to the
532 \texttt{bit} type might make more sense (since the Haskell version
533 only has two values), but using \texttt{std\_logic} is more standard
534 (and allowed for some experimentation with don't care values)
537 This is the only built-in Haskell type supported and is translated
538 exactly like the Bit type (where a value of \hs{True} corresponds to a
539 value of \hs{High}). Supporting the Bool type is particularly
540 useful to support \hs{if ... then ... else ...} expressions, which
541 always have a \hs{Bool} value for the condition.
543 A \hs{Bool} is translated to a \texttt{std\_logic}, just like \hs{Bit}.
544 \item[\hs{SizedWord}, \hs{SizedInt}]
545 These are types to represent integers. A \hs{SizedWord} is unsigned,
546 while a \hs{SizedInt} is signed. These types are parametrized by a
547 length type, so you can define an unsigned word of 32 bits wide as
551 type Word32 = SizedWord D32
554 Here, a type synonym \hs{Word32} is defined that is equal to the
555 \hs{SizedWord} type constructor applied to the type \hs{D32}. \hs{D32}
556 is the \emph{type level representation} of the decimal number 32,
557 making the \hs{Word32} type a 32-bit unsigned word.
559 These types are translated to the \small{VHDL} \texttt{unsigned} and
560 \texttt{signed} respectively.
562 This is a vector type, that can contain elements of any other type and
563 has a fixed length. It has two type parameters: its
564 length and the type of the elements contained in it. By putting the
565 length parameter in the type, the length of a vector can be determined
566 at compile time, instead of only at run-time for conventional lists.
568 The \hs{Vector} type constructor takes two type arguments: the length
569 of the vector and the type of the elements contained in it. The state
570 type of an 8 element register bank would then for example be:
573 type RegisterState = Vector D8 Word32
576 Here, a type synonym \hs{RegisterState} is defined that is equal to
577 the \hs{Vector} type constructor applied to the types \hs{D8} (The type
578 level representation of the decimal number 8) and \hs{Word32} (The 32
579 bit word type as defined above). In other words, the
580 \hs{RegisterState} type is a vector of 8 32-bit words.
582 A fixed size vector is translated to a \VHDL\ array type.
583 \item[\hs{RangedWord}]
584 This is another type to describe integers, but unlike the previous
585 two it has no specific bit-width, but an upper bound. This means that
586 its range is not limited to powers of two, but can be any number.
587 A \hs{RangedWord} only has an upper bound, its lower bound is
588 implicitly zero. There is a lot of added implementation complexity
589 when adding a lower bound and having just an upper bound was enough
590 for the primary purpose of this type: type-safely indexing vectors.
592 To define an index for the 8 element vector above, we would do:
595 type RegisterIndex = RangedWord D7
598 Here, a type synonym \hs{RegisterIndex} is defined that is equal to
599 the \hs{RangedWord} type constructor applied to the type \hs{D7}. In
600 other words, this defines an unsigned word with values from
601 0 to 7 (inclusive). This word can be be used to index the
602 8 element vector \hs{RegisterState} above.
604 This type is translated to the \texttt{unsigned} \VHDL type.
606 \subsection{User-defined types}
607 There are three ways to define new types in Haskell: algebraic
608 data-types with the \hs{data} keyword, type synonyms with the \hs{type}
609 keyword and type renamings with the \hs{newtype} keyword. \GHC\
610 offers a few more advanced ways to introduce types (type families,
611 existential typing, \small{GADT}s, etc.) which are not standard
612 Haskell. These will be left outside the scope of this research.
614 Only an algebraic datatype declaration actually introduces a
615 completely new type, for which we provide the \VHDL\ translation
616 below. Type synonyms and renamings only define new names for
617 existing types (where synonyms are completely interchangeable and
618 renamings need explicit conversion). Therefore, these do not need
619 any particular \VHDL\ translation, a synonym or renamed type will
620 just use the same representation as the original type. The
621 distinction between a renaming and a synonym does no longer matter
622 in hardware and can be disregarded in the generated \VHDL.
624 For algebraic types, we can make the following distinction:
629 A product type is an algebraic datatype with a single constructor with
630 two or more fields, denoted in practice like (a,b), (a,b,c), etc. This
631 is essentially a way to pack a few values together in a record-like
632 structure. In fact, the built-in tuple types are just algebraic product
633 types (and are thus supported in exactly the same way).
635 The ``product'' in its name refers to the collection of values belonging
636 to this type. The collection for a product type is the Cartesian
637 product of the collections for the types of its fields.
639 These types are translated to \VHDL\ record types, with one field for
640 every field in the constructor. This translation applies to all single
641 constructor algebraic data-types, including those with just one
642 field (which are technically not a product, but generate a VHDL
643 record for implementation simplicity).
644 \item[Enumerated types]
645 An enumerated type is an algebraic datatype with multiple constructors, but
646 none of them have fields. This is essentially a way to get an
647 enumeration-like type containing alternatives.
649 Note that Haskell's \hs{Bool} type is also defined as an
650 enumeration type, but we have a fixed translation for that.
652 These types are translated to \VHDL\ enumerations, with one value for
653 each constructor. This allows references to these constructors to be
654 translated to the corresponding enumeration value.
656 A sum type is an algebraic datatype with multiple constructors, where
657 the constructors have one or more fields. Technically, a type with
658 more than one field per constructor is a sum of products type, but
659 for our purposes this distinction does not really make a
660 difference, so this distinction is note made.
662 The ``sum'' in its name refers again to the collection of values
663 belonging to this type. The collection for a sum type is the
664 union of the the collections for each of the constructors.
666 Sum types are currently not supported by the prototype, since there is
667 no obvious \VHDL\ alternative. They can easily be emulated, however, as
668 we will see from an example:
671 data Sum = A Bit Word | B Word
674 An obvious way to translate this would be to create an enumeration to
675 distinguish the constructors and then create a big record that
676 contains all the fields of all the constructors. This is the same
677 translation that would result from the following enumeration and
678 product type (using a tuple for clarity):
682 type Sum = (SumC, Bit, Word, Word)
685 Here, the \hs{SumC} type effectively signals which of the latter three
686 fields of the \hs{Sum} type are valid (the first two if \hs{A}, the
687 last one if \hs{B}), all the other ones have no useful value.
689 An obvious problem with this naive approach is the space usage: the
690 example above generates a fairly big \VHDL\ type. Since we can be
691 sure that the two \hs{Word}s in the \hs{Sum} type will never be valid
692 at the same time, this is a waste of space.
694 Obviously, duplication detection could be used to reuse a
695 particular field for another constructor, but this would only
696 partially solve the problem. If two fields would be, for
697 example, an array of 8 bits and an 8 bit unsigned word, these are
698 different types and could not be shared. However, in the final
699 hardware, both of these types would simply be 8 bit connections,
700 so we have a 100\% size increase by not sharing these.
704 \section{\CLaSH\ prototype}
708 \section{Related work}
709 Many functional hardware description languages have been developed over the years. Early work includes such languages as \textsc{$\mu$fp}~\cite{muFP}, an extension of Backus' \textsc{fp} language to synchronous streams, designed particularly for describing and reasoning about regular circuits. The Ruby~\cite{Ruby} language uses relations, instead of functions, to describe circuits, and has a particular focus on layout. \textsc{hml}~\cite{HML2} is a hardware modeling language based on the strict functional language \textsc{ml}, and has support for polymorphic types and higher-order functions. Published work suggests that there is no direct simulation support for \textsc{hml}, and that the translation to \VHDL\ is only partial.
711 Like this work, many functional hardware description languages have some sort of foundation in the functional programming language Haskell. Hawk~\cite{Hawk1} uses Haskell to describe system-level executable specifications used to model the behavior of superscalar microprocessors. Hawk specifications can be simulated, but there seems to be no support for automated circuit synthesis. The ForSyDe~\cite{ForSyDe2} system uses Haskell to specify abstract system models, which can (manually) be transformed into an implementation model using semantic preserving transformations. ForSyDe has several simulation and synthesis backends, though synthesis is restricted to the synchronous subset of the ForSyDe language.
713 Lava~\cite{Lava} is a hardware description language that focuses on the structural representation of hardware. Besides support for simulation and circuit synthesis, Lava descriptions can be interfaced with formal method tools for formal verification. Lava descriptions are actually circuit generators when viewed from a synthesis viewpoint, in that the language elements of Haskell, such as choice, can be used to guide the circuit generation. If a developer wants to insert a choice element inside an actual circuit he will have to specify this explicitly as a component. In this respect \CLaSH\ differs from Lava, in that all the choice elements, such as case-statements and patter matching, are synthesized to choice elements in the eventual circuit. As such, richer control structures can both be specified and synthesized in \CLaSH\ compared to any of the languages mentioned in this section.
715 The merits of polymorphic typing, combined with higher-order functions, are now also recognized in the `main-stream' hardware description languages, exemplified by the new \VHDL\ 2008 standard~\cite{VHDL2008}. \VHDL-2008 has support to specify types as generics, thus allowing a developer to describe polymorphic components. Note that those types still require an explicit generic map, whereas type-inference and type-specialization are implicit in \CLaSH.
717 Wired~\cite{Wired},, T-Ruby~\cite{T-Ruby}, Hydra~\cite{Hydra}.
719 A functional language designed specifically for hardware design is $re{\mathit{FL}}^{ect}$~\cite{reFLect}, which draws experience from earlier language called \textsc{fl}~\cite{FL} to la
721 % An example of a floating figure using the graphicx package.
722 % Note that \label must occur AFTER (or within) \caption.
723 % For figures, \caption should occur after the \includegraphics.
724 % Note that IEEEtran v1.7 and later has special internal code that
725 % is designed to preserve the operation of \label within \caption
726 % even when the captionsoff option is in effect. However, because
727 % of issues like this, it may be the safest practice to put all your
728 % \label just after \caption rather than within \caption{}.
730 % Reminder: the "draftcls" or "draftclsnofoot", not "draft", class
731 % option should be used if it is desired that the figures are to be
732 % displayed while in draft mode.
736 %\includegraphics[width=2.5in]{myfigure}
737 % where an .eps filename suffix will be assumed under latex,
738 % and a .pdf suffix will be assumed for pdflatex; or what has been declared
739 % via \DeclareGraphicsExtensions.
740 %\caption{Simulation Results}
744 % Note that IEEE typically puts floats only at the top, even when this
745 % results in a large percentage of a column being occupied by floats.
748 % An example of a double column floating figure using two subfigures.
749 % (The subfig.sty package must be loaded for this to work.)
750 % The subfigure \label commands are set within each subfloat command, the
751 % \label for the overall figure must come after \caption.
752 % \hfil must be used as a separator to get equal spacing.
753 % The subfigure.sty package works much the same way, except \subfigure is
754 % used instead of \subfloat.
757 %\centerline{\subfloat[Case I]\includegraphics[width=2.5in]{subfigcase1}%
758 %\label{fig_first_case}}
760 %\subfloat[Case II]{\includegraphics[width=2.5in]{subfigcase2}%
761 %\label{fig_second_case}}}
762 %\caption{Simulation results}
766 % Note that often IEEE papers with subfigures do not employ subfigure
767 % captions (using the optional argument to \subfloat), but instead will
768 % reference/describe all of them (a), (b), etc., within the main caption.
771 % An example of a floating table. Note that, for IEEE style tables, the
772 % \caption command should come BEFORE the table. Table text will default to
773 % \footnotesize as IEEE normally uses this smaller font for tables.
774 % The \label must come after \caption as always.
777 %% increase table row spacing, adjust to taste
778 %\renewcommand{\arraystretch}{1.3}
779 % if using array.sty, it might be a good idea to tweak the value of
780 % \extrarowheight as needed to properly center the text within the cells
781 %\caption{An Example of a Table}
782 %\label{table_example}
784 %% Some packages, such as MDW tools, offer better commands for making tables
785 %% than the plain LaTeX2e tabular which is used here.
786 %\begin{tabular}{|c||c|}
796 % Note that IEEE does not put floats in the very first column - or typically
797 % anywhere on the first page for that matter. Also, in-text middle ("here")
798 % positioning is not used. Most IEEE journals/conferences use top floats
799 % exclusively. Note that, LaTeX2e, unlike IEEE journals/conferences, places
800 % footnotes above bottom floats. This can be corrected via the \fnbelowfloat
801 % command of the stfloats package.
806 The conclusion goes here.
811 % conference papers do not normally have an appendix
814 % use section* for acknowledgement
815 \section*{Acknowledgment}
818 The authors would like to thank...
824 % trigger a \newpage just before the given reference
825 % number - used to balance the columns on the last page
826 % adjust value as needed - may need to be readjusted if
827 % the document is modified later
828 %\IEEEtriggeratref{8}
829 % The "triggered" command can be changed if desired:
830 %\IEEEtriggercmd{\enlargethispage{-5in}}
834 % can use a bibliography generated by BibTeX as a .bbl file
835 % BibTeX documentation can be easily obtained at:
836 % http://www.ctan.org/tex-archive/biblio/bibtex/contrib/doc/
837 % The IEEEtran BibTeX style support page is at:
838 % http://www.michaelshell.org/tex/ieeetran/bibtex/
839 \bibliographystyle{IEEEtran}
840 % argument is your BibTeX string definitions and bibliography database(s)
841 \bibliography{IEEEabrv,cλash.bib}
843 % <OR> manually copy in the resultant .bbl file
844 % set second argument of \begin to the number of references
845 % (used to reserve space for the reference number labels box)
846 % \begin{thebibliography}{1}
848 % \bibitem{IEEEhowto:kopka}
849 % H.~Kopka and P.~W. Daly, \emph{A Guide to \LaTeX}, 3rd~ed.\hskip 1em plus
850 % 0.5em minus 0.4em\relax Harlow, England: Addison-Wesley, 1999.
852 % \end{thebibliography}
860 % vim: set ai sw=2 sts=2 expandtab: