4 {-# LANGUAGE TypeOperators, TypeFamilies, FlexibleContexts #-}
7 import CLasH.HardwareTypes
8 import CLasH.Translator.Annotations
9 import qualified Prelude as P
13 \section{Polymorphic, Higher-Order CPU}
14 \subsection{Introduction}
17 \frametitle{Small Use Case}
19 \column{0.5\textwidth}
21 \includegraphics[width=4.75cm]{simpleCPU}
23 \column{0.5\textwidth}
26 \item Polymorphic, Higher-Order CPU
27 \item Use of state will be simple
31 \item Small "toy"-example of what can be done in \clash{}
32 \item Show what can be translated to Hardware
33 \item Put your hardware glasses on: each function will be a component
34 \item Use of state will be kept simple
37 \subsection{Type Definitions}
40 \frametitle{Type definitions}\pause
42 \column{0.5\textwidth}
44 \includegraphics[width=4.75cm]{simpleCPU}
46 \column{0.5\textwidth}
49 First we define some ALU types:
50 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
52 type Op a = a -> a -> a
55 \end{beamercolorbox}\pause
57 And some Register types:
58 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
68 type Word = SizedInt D12
73 \item The ALU operation is already polymorphic in input / output type
74 \item We use a fixed size vector as the placeholder for the registers
75 \item State has to be of the State type to be recognized as such
78 \subsection{Polymorphic, Higher-Order ALU}
81 \frametitle{Simple ALU}
83 \includegraphics[width=5.25cm,trim=0mm 5.5cm 0mm 1cm, clip=true]{simpleCPU}
85 Abstract ALU definition:
86 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
91 alu op1 op2 {-"{\color<2>[rgb]{1,0,0}"-}Low{-"}"-} a b = op1 a b
92 alu op1 op2 {-"{\color<2>[rgb]{1,0,0}"-}High{-"}"-} a b = op2 a b
96 \item Alu is both higher-order, and polymorphic
97 \item First two parameters are "compile time", other three are "runtime"
98 \item We support pattern matching
101 \subsection{Register bank}
104 \frametitle{Register Bank}
106 \includegraphics[width=5.25cm,trim=0mm 0.4cm 0mm 6.2cm, clip=true]{simpleCPU}
111 CXT((NaturalT s ,PositiveT (s :+: D1),((s :+: D1) :>: s) ~ True )) => a -> RangedWord s ->
112 RangedWord s -> (RegState s a) -> (RegState s a, a )
115 A simple register bank:
116 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
118 registers data_in rdaddr wraddr (State mem) =
119 ((State mem'), data_out)
121 data_out = mem!rdaddr
122 mem' = replace mem wraddr data_in
126 \item mem is statefull, indicated by the 'State' type
127 \item replace and (!) are a builtin functions
130 \subsection{Simple CPU: ALU \& Register Bank}
133 \frametitle{Simple CPU}
134 Combining ALU and register bank:
135 \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox}
138 type Instruction = (Opcode, Word, RangedWord D9, RangedWord D9)
142 {-"{\color<2>[rgb]{1,0,0}"-}ANN(cpu TopEntity){-"}"-}
144 Instruction -> RegState D9 Word -> (RegState D9 Word, Word)
146 cpu (opc, d, rdaddr, wraddr) ram = (ram', alu_out)
148 alu_out = alu {-"{\color<3>[rgb]{1,0,0}"-}(+){-"}"-} {-"{\color<3>[rgb]{1,0,0}"-}(-){-"}"-} opc d ram_out
149 (ram',ram_out) = registers alu_out rdaddr wraddr ram
153 \uncover<2->{\item Annotation is used to indicate top-level component}
154 \uncover<3->{\item Instantiate actual operations}
157 \item We use the new Annotion functionality to indicate this is the top level. TopEntity is defined by us.
158 \item At this stage, both operations for the ALU are defined
159 \item No polymorphism or higher-order stuff is allowed at this level.
160 \item Functions must be specialized, and have primitives for input and output
165 ANN(initstate InitState)
166 initstate :: RegState D9 Word
167 initstate = State (copy (0 :: Word))
169 ANN(program TestInput)
170 program :: [Instruction]
172 [ (Low, 4, 0, 0) -- Write 4 to Reg0
173 , (Low, 3, 0, 1) -- Write 3+4 to Reg1
174 , (High,8, 1, 2) -- Write 8-7 to Reg2
177 run func state [] = []
178 run func state (i:input) = o:out
180 (state', o) = func i state
181 out = run func state' input
186 let istate = initstate
187 let output = run cpu istate input
188 mapM_ (\x -> putStr $ ("(" P.++ (show x) P.++ ")\n")) output