add_offset(m.output_b_re, 2);\r
add_offset(m.output_b_im, 2);\r
\r
- if (second_half) {\r
+ if (!second_half) {\r
write_mem(m.output_a_re, res.a_re);\r
write_mem(m.output_a_im, res.a_im);\r
write_mem(m.output_b_re, res.b_re);\r
\r
/* Now, do half a single stage. That means N_t / 4 cycles. Since we do 2\r
* cycles on every iteration, plus one before and after the loop,\r
- * we will loop N_t / 8 - 1 times. */\r
- init_loop(LC2, (PARAM_N_t / 8) - 1);\r
+ * we will loop N_t / 8 - 1 times. We add an extra - 1 because this is a do while loop... */\r
+ init_loop(LC2, (PARAM_N_t / 8) - 1 - 1);\r
do {\r
/* Write outputs of previous cycle */\r
write_output_regular(m, out, second_half);\r
struct mems m;\r
\r
/* We need to do n_t regular stages. Since we do two stages each\r
- * iteration, we'll do n_t / 2 iterations. */\r
- init_loop(LC1, (PARAM_n_t / 2));\r
+ * iteration, we'll do n_t / 2 iterations (and a -1 because we check after looping) */\r
+ init_loop(LC1, (PARAM_n_t / 2) - 1);\r
do {\r
m = init_mem_mapping(EVEN_STAGE);\r
init_input_addresses_regular(m, EVEN_STAGE);\r