* Change loops back to do while, MontiumCC can't handle while loops.

[matthijs/projects/montium-fft.git] / FFT.mc

diff --git a/FFT.mc b/FFT.mc
index 6688275a9f32d7a7341ead36d3859efe18578e57..5969315c8a174d1cadc4b8e49e60bee63f813f1c 100644 (file)
--- a/FFT.mc
+++ b/FFT.mc
@@ -188,8 +188,8 @@ INLINE void do_half_regular_stage(struct mems m, bool stage_odd, bool second_hal
        /* Now, do half a single stage. That means N_t / 4 cycles. Since we do 2\r
         * cycles on every iteration, plus one before and after the loop,\r
         * we will loop N_t / 8 - 1 times. We add an extra - 1 because this is a do while loop... */\r
-       init_loop(LC2, (PARAM_N_t / 8) - 1);\r
-       while (loop_next(LC2)) {\r
+       init_loop(LC2, (PARAM_N_t / 8) - 1 - 1);\r
+       do {\r
                /* Write outputs of previous cycle */\r
                write_output_regular(m, out, second_half);\r
 \r
@@ -204,7 +204,7 @@ INLINE void do_half_regular_stage(struct mems m, bool stage_odd, bool second_hal
                /* Even cycle */\r
                in = read_input_regular(m, EVEN_CYCLE, second_half);\r
                out = butterfly(in);\r
-       }\r
+       } while (loop_next(LC2));\r
        \r
        /* Write outputs of previous cycle */\r
        write_output_regular(m, out, second_half);\r
@@ -254,9 +254,9 @@ void run() {
        struct mems m;\r
 \r
        /* We need to do n_t regular stages. Since we do two stages each\r
-        * iteration, we'll do n_t / 2 iterations. */\r
-       init_loop(LC1, (PARAM_n_t / 2));\r
-       while (loop_next(LC1)) {\r
+        * iteration, we'll do n_t / 2 iterations (and a -1 because we check after looping) */\r
+       init_loop(LC1, (PARAM_n_t / 2) - 1);\r
+       do {\r
                m = init_mem_mapping(EVEN_STAGE);\r
                init_input_addresses_regular(m, EVEN_STAGE);\r
                /* do_half_regular_stage will init output addresses */\r
@@ -271,5 +271,5 @@ void run() {
                do_half_regular_stage(m, ODD_STAGE, FIRST_HALF);\r
                do_half_regular_stage(m, ODD_STAGE, SECOND_HALF);\r
                stage++;\r
-       }\r
+       } while (loop_next(LC1));\r
 }\r