From 70c17aa5346776371e1d66ecc0371c0a3ce179d2 Mon Sep 17 00:00:00 2001 From: Matthijs Kooijman Date: Mon, 30 Nov 2009 21:45:34 +0100 Subject: [PATCH] Put a VHDL in smallcaps. --- Chapters/Future.tex | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Chapters/Future.tex b/Chapters/Future.tex index 852d14f..9c60dfe 100644 --- a/Chapters/Future.tex +++ b/Chapters/Future.tex @@ -391,8 +391,8 @@ behaviour is not needed. The main cost of this approach will probably be extra complexity in the compiler: The paths (state) data can take become very non-trivial, and it -is probably hard to properly analyze these paths and produce the intended VHDL -description. +is probably hard to properly analyze these paths and produce the +intended \VHDL description. \section{Multiple cycle descriptions} In the current Cλash prototype, every description is a single-cycle -- 2.30.2