From: Matthijs Kooijman Date: Tue, 8 Dec 2009 15:33:37 +0000 (+0100) Subject: Put some function names inside \hs. X-Git-Tag: final-thesis~31 X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=commitdiff_plain;h=8dd68eec190c3e5ab7789344b98c784cd6e2fcd2 Put some function names inside \hs. --- diff --git a/Chapters/Prototype.tex b/Chapters/Prototype.tex index 73873bd..390e98b 100644 --- a/Chapters/Prototype.tex +++ b/Chapters/Prototype.tex @@ -1424,11 +1424,11 @@ end architecture structural; \stopbuffer - \placeexample[][ex:AvgStateTypes]{\VHDL\ types generated for acc and avg from \in{example}[ex:AvgState]} + \placeexample[][ex:AvgStateTypes]{\VHDL\ types generated for \hs{acc} and \hs{avg} from \in{example}[ex:AvgState]} {\typebuffervhdl{AvgStateTypes}} - \placeexample[][ex:AccStateVHDL]{\VHDL\ generated for acc from \in{example}[ex:AvgState]} + \placeexample[][ex:AccStateVHDL]{\VHDL\ generated for \hs{acc} from \in{example}[ex:AvgState]} {\typebuffervhdl{AccStateVHDL}} - \placeexample[][ex:AvgStateVHDL]{\VHDL\ generated for avg from \in{example}[ex:AvgState]} + \placeexample[][ex:AvgStateVHDL]{\VHDL\ generated for \hs{avg} from \in{example}[ex:AvgState]} {\typebuffervhdl{AvgStateVHDL}} % \subsection{Initial state} % How to specify the initial state? Cannot be done inside a hardware