X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=blobdiff_plain;f=Outline;h=074f6a6105a1ee1b20fa1944352d8f685b5717df;hp=38383b8acb846b608489a58bee96ec9567081aa4;hb=72edba19e4b745b8aa064ebd4f105d01a6055d8b;hpb=1c16f3b33548a1b08064263c63ab8b7f7e9f06ed diff --git a/Outline b/Outline index 38383b8..074f6a6 100644 --- a/Outline +++ b/Outline @@ -1,44 +1,52 @@ -Context - Other FHDLs (short, Christiaan has details) - - Advantages of clash / why clash? - - VHDL / Verilog / EDIF etc. Why VHDL? +Introduction +* Goals +* Outline +*Context +* Other FHDLs (short, Christiaan has details) +* Advantages of clash / why clash? Haskell as hardware - Simple function -> component interpretation (Model: Structure) - Model: State - Explicit vs implicit passing of state (e.g, delay) - Explicit vs implicit marking - Interpret: Polymorphism - Interpret: Higher order +* Simple function -> component interpretation (Model: Structure) +* Partial application +* Model: State +* Explicit vs implicit passing of state (e.g, delay) +* Explicit vs implicit marking +* Interpret: Polymorphism +* Interpret: Higher order Need: Dependent types - Impossible things: Infinite recursion, higher order expressions +* Recursion + Impossible things: Infinite recursion, higher order expressions, + recursive types, ... Prototype - Choice of Haskell - Core - description of the language (appendix?) - Stages (-> Core, Normalization, -> VHDL) - Implementation issues +* Choice of Haskell + VHDL / Verilog / EDIF etc. Why VHDL? +* Stages (-> Core, Normalization, -> VHDL) +. Core - description of the language (appendix?) + Implementation issues -- Which? + State annotations Haskell language coverage / constraints Recursion Builtin types Custom types (Sum types, product types) Function types / higher order expressions + State type -> Anything representable Normalization - Normal form - Rules used - Completeness / conditions on input - Termination - Casts +* Normal form +* Rules used +. Properties / Proofs (termination, soundness, completeness, determinism) + Casts / Strictness / Casebinders not fully supported Future work - Boilerplate reduction (State distribution & pipelining) - Recursion - Multiple time domains (Events) - Multiple cycle descriptions - Higher order state - New language +. Boilerplate reduction (State distribution & pipelining) +* Recursion +* Multiple time domains (Events) -- Also, clock line optimization / + -- write enable +* Multiple cycle descriptions +* Higher order state +* New language + +TODO: Define user / developer