X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=blobdiff_plain;f=Chapters%2FPrototype.tex;h=adae92ca1dc63bc573cf64de600d53ec77c9ffe8;hp=7cd5ea5e90da46e8286902a2eb34101406f8f61a;hb=33275ac17aefc80c72f52d2cf36f171e6d9b175e;hpb=d3656f7210afe8b98cb1d8eb3f2fa793f94b3953;ds=sidebyside

diff --git a/Chapters/Prototype.tex b/Chapters/Prototype.tex
index 7cd5ea5..adae92c 100644
--- a/Chapters/Prototype.tex
+++ b/Chapters/Prototype.tex
@@ -66,7 +66,7 @@
     meta-format, but the hardware components that can be used vary between
     various tool and hardware vendors, as well as the interpretation of the
     \small{EDIF} standard (TODO Is this still true? Reference:
-    http://delivery.acm.org/10.1145/80000/74534/p803-li.pdf?key1=74534\&key2=8370537521&coll=GUIDE&dl=GUIDE&CFID=61207158&CFTOKEN=61908473).
+    http://delivery.acm.org/10.1145/80000/74534/p803-li.pdf?key1=74534\&key2=8370537521\&coll=GUIDE\&dl=GUIDE\&CFID=61207158\&CFTOKEN=61908473).
    
     This means that when working with EDIF, our prototype would become
     technology dependent (\eg only work with \small{FPGA}s of a specific