X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=blobdiff_plain;f=Chapters%2FNormalization.tex;h=d8f2fe9723182bdc4d66236e1b79b48a63454470;hp=3356a4f4d03a0acd48cb2b3f115f91e28c107060;hb=25d228c0ea102570073ccf5dd642615cc2ebe7a1;hpb=f3a705e9d90ff0e54ef6bfec8db58947d7587704

diff --git a/Chapters/Normalization.tex b/Chapters/Normalization.tex
index 3356a4f..d8f2fe9 100644
--- a/Chapters/Normalization.tex
+++ b/Chapters/Normalization.tex
@@ -14,7 +14,6 @@
   }
 }
 
-
 \define[3]\transexample{
   \placeexample[here]{#1}
   \startcombination[2*1]
@@ -22,14 +21,6 @@
     {\example{#3}}{Transformed program}
   \stopcombination
 }
-%
-%\define[3]\transexampleh{
-%%  \placeexample[here]{#1}
-%%  \startcombination[1*2]
-%%    {\example{#2}}{Original program}
-%%    {\example{#3}}{Transformed program}
-%%  \stopcombination
-%}
 
 The first step in the core to \small{VHDL} translation process, is normalization. We
 aim to bring the core description into a simpler form, which we can