X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=blobdiff_plain;f=Chapters%2FIntroduction.tex;h=b5e2e2436404d5f591e4c4c65cdaa6ddddf49b77;hp=69fb7e403c0dea60697a32b2972add6a7c42aa61;hb=9a64968e619e6cf17f914e59f90e1d4996e8724c;hpb=b585bb305e914b8ad88da1876c8daef66e9bbb95 diff --git a/Chapters/Introduction.tex b/Chapters/Introduction.tex index 69fb7e4..b5e2e24 100644 --- a/Chapters/Introduction.tex +++ b/Chapters/Introduction.tex @@ -1,4 +1,4 @@ -\chapter{Introduction} +\chapter[chap:introduction]{Introduction} This thesis describes the result and process of my work during my Master's assignment. In these pages, I will try to introduce the world of hardware descriptions, the world of functional languages and @@ -136,7 +136,7 @@ sum' (x:xs) acc = acc' : (sum' xs acc') newCircle.a(btex + etex); newCircle.out(btex $output$ etex) "framed(false)"; - % Punt inp, a and out in one horizontal line, with reg above a + % Put inp, a and out in one horizontal line, with reg above a reg.c-a.c=(0cm, 2cm); a.c-inp.c=(3cm, 0cm); out.c-a.c=(3cm, 0cm); @@ -177,6 +177,7 @@ sum' (x:xs) acc = acc' : (sum' xs acc') How can we describe the structural properties of a hardware design, using a functional language? \stopquotation + \setupquotation[style=normal,spacebefore=] We can further split this into subquestions from a hardware perspective: \startitemize @@ -184,13 +185,20 @@ sum' (x:xs) acc = acc' : (sum' xs acc') \item How can we describe (hierarchical) structure in a design? \stopitemize - functional perspective: + And subquestions from a functional perspective: \startitemize \item How to interpret recursion in descriptions? \item How to interpret polymorphism? \item How to interpret higher order in descriptions? \stopitemize + In addition to looking at designing a hardware description language, we + will also implement a prototype to test drive our ideas. This prototype will + translate hardware descriptions written in the Haskell functional language + to simple (netlist-like) hardware descriptions in the \VHDL language. The + reasons for choosing these languages are detailed in section + \in{}[sec:prototype:input] and \in{}[sec:prototype:output] respectively. + \section{Outline} In the first chapter, we will sketch the context for this research.