X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=blobdiff_plain;f=Chapters%2FIntroduction.tex;h=b5e2e2436404d5f591e4c4c65cdaa6ddddf49b77;hp=0f0097bc67e3f54c7ac197698abfc79d543f5bfa;hb=9a64968e619e6cf17f914e59f90e1d4996e8724c;hpb=ffd46307f9efcf5b103e76dcc1a13d5fe0fe372a diff --git a/Chapters/Introduction.tex b/Chapters/Introduction.tex index 0f0097b..b5e2e24 100644 --- a/Chapters/Introduction.tex +++ b/Chapters/Introduction.tex @@ -185,13 +185,20 @@ sum' (x:xs) acc = acc' : (sum' xs acc') \item How can we describe (hierarchical) structure in a design? \stopitemize - functional perspective: + And subquestions from a functional perspective: \startitemize \item How to interpret recursion in descriptions? \item How to interpret polymorphism? \item How to interpret higher order in descriptions? \stopitemize + In addition to looking at designing a hardware description language, we + will also implement a prototype to test drive our ideas. This prototype will + translate hardware descriptions written in the Haskell functional language + to simple (netlist-like) hardware descriptions in the \VHDL language. The + reasons for choosing these languages are detailed in section + \in{}[sec:prototype:input] and \in{}[sec:prototype:output] respectively. + \section{Outline} In the first chapter, we will sketch the context for this research.