X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Freport.git;a=blobdiff_plain;f=Chapters%2FIntroduction.tex;fp=Chapters%2FIntroduction.tex;h=af334a3208a87f1611b536fd0e3510277031fa64;hp=334b1c89d734486f1f960bb92717f767b43c5a8c;hb=75d1001c7a7809c80bc4113477ad90b12f23b80f;hpb=8d8f1604f480e79ec31a6c706e25ca1d9a6d6add

diff --git a/Chapters/Introduction.tex b/Chapters/Introduction.tex
index 334b1c8..af334a3 100644
--- a/Chapters/Introduction.tex
+++ b/Chapters/Introduction.tex
@@ -220,7 +220,7 @@ advanced types and provides a case study.
   In addition to looking at designing a hardware description language, we
   will also implement a prototype to test ideas. This prototype will
   translate hardware descriptions written in the Haskell functional language
-  to simple (netlist-like) hardware descriptions in the \VHDL language. The
+  to simple (netlist-like) hardware descriptions in the \VHDL\ language. The
   reasons for choosing these languages are detailed in section
   \in{}[sec:prototype:input] and \in{}[sec:prototype:output] respectively.