Fix the return value simplification transformation.

[matthijs/master-project/report.git] / Outline

diff --git a/Outline b/Outline
index 73246f9dc78177926933e61cfeb46677cee82dea..bbcf46ad914c0e12a0a8615ef1786b1ff3c53db7 100644 (file)
--- a/Outline
+++ b/Outline
@@ -1,41 +1,62 @@
-Implementation issues
+Introduction
+*       Goals
+*       Outline
 
-State
+*Context
+*       Other FHDLs (short, Christiaan has details)
+*       Advantages of clash / why clash?
 
-Prototype
-       Stages (-> Core, Normalization, -> VHDL)
-
-Core
+Haskell as hardware
+*       Simple function -> component interpretation (Model: Structure)
+*       Choice / Case
+*       Types
+*       Partial application
+*       Model: State
+*         Explicit vs implicit passing of state (e.g, delay)
+*         Explicit vs implicit marking
+*       Interpret: Polymorphism
+*       Interpret: Higher order
+*       Recursion
 
-VHDL vs EDIF generation
+Prototype
+*       Choice of Haskell
+*       VHDL / Verilog / EDIF etc. Why VHDL?
+*      Stages (-> Core, Normalization, -> VHDL)
+.       Core - description of the language
+*         Expressions
+          Typing
+        Implementation issues -- Which?
+        State annotations
 
 Normalization
-       Normal form
-       Rules used
-       Completeness / conditions on input
-       Termination
-       Casts
-
-Context
-
-Other FHDLs
-
-VHDL / Verilog / EDIF etc.
-
-Advantages of clash / why clash?
-
-Haskell as hardware
-       Dependent types
-       Impossible things: Infinite recursion, higher order expressions
-
-Haskell language coverage / constraints
-       Recursion
-       Builtin types
-       Custom types (Sum types, product types)
-       Function types / higher order expressions
+*      Normal form
+*      Rules used
+.      Properties / Proofs (termination, soundness, completeness, determinism)
 
 Future work
-       Boilerplate reduction (State distribution & pipelining)
-       Recursion
-       Multiple time domains
-       Multiple cycle descriptions
+*      Boilerplate reduction (State distribution & pipelining)
+*      Recursion
+*       Multiple time domains (Events) -- Also, clock line optimization /
+                                       -- write enable
+*      Multiple cycle descriptions
+*       Higher order state
+*       New language
+*       Don't care
+
+TODO: Define user / developer
+TODO: Hardware description / model vs program
+TODO: Separate compilation / Prelude
+TODO: User-defined type classes (future work?)
+TODO: Entity / Architecture / Component vs Function?
+TODO: Expand on "representable"
+TODO: Register
+TODO: Variable vs binder
+TODO: simplification -> Normalisation?
+TODO: Use saturated (application) instead of complete (application)?
+TODO: core => Core
+TODO: Say something about implementation differences with transformation specs
+TODO: Say something about the builtin functions somewhere (ref: christiaan)
+TODO: Future work: Use Cλash
+TODO: Abstract
+TODO: Preface
+TODO: Top level function -> top level binder