In addition to looking at designing a hardware description language, we
will also implement a prototype to test ideas. This prototype will
translate hardware descriptions written in the Haskell functional language
- to simple (netlist-like) hardware descriptions in the \VHDL language. The
+ to simple (netlist-like) hardware descriptions in the \VHDL\ language. The
reasons for choosing these languages are detailed in section
\in{}[sec:prototype:input] and \in{}[sec:prototype:output] respectively.