Fix a lot of things following from Jan's comments.

[matthijs/master-project/report.git] / Chapters / Introduction.tex

diff --git a/Chapters/Introduction.tex b/Chapters/Introduction.tex
index f88b2257affdd9b5167b45e33edd60e33fd1c88d..5b11f5d26f3306447338a70c778e9d92d6fbc1ea 100644 (file)
--- a/Chapters/Introduction.tex
+++ b/Chapters/Introduction.tex
@@ -1,6 +1,6 @@
 \chapter[chap:introduction]{Introduction}
 This thesis describes the result and process of my work during my
-Master's assignment. In these pages, I will try to introduce the world
+Master's assignment. In these pages, I will introduce the world
 of hardware descriptions, the world of functional languages and
 compilers and introduce the hardware description language Cλash that will
 connect these worlds and puts a step towards making hardware programming
@@ -10,12 +10,12 @@ on the whole easier, more maintainable and generally more pleasant.
 \subject{Research goals}
   This research started out with the notion that a functional program is very
   easy to interpret as a hardware description. A functional program typically
-  does no assumptions about evaluation order and does not have any side
+  makes no assumptions about evaluation order and does not have any side
   effects. This fits hardware nicely, since the evaluation order for hardware
   is simply everything in parallel.
 
   As a motivating example, consider the simple functional program shown in
-  \in{example}[ex:AndWord]\footnote[notfinalsyntax]{Note that this example is not in the final
+  \in{example}[ex:AndWord]\footnote[notfinalsyntax]{This example is not in the final
   Cλash syntax}. This is a very natural way to describe a lot of parallel not
   ports, that perform a bitwise not on a bitvector. The example also shows an
   image of the architecture described.
@@ -140,7 +140,8 @@ on the whole easier, more maintainable and generally more pleasant.
 
 
   Or... is this the description of a single accumulating adder, that will add
-  one element of each input each clock cycle and has a reset value of 0? In
+  one element of each input each clock cycle and has a reset value of
+  0\todo{normal 0}? In
   that case, we would have described the architecture show in \in{example}[ex:RecursiveSumAlt]
 
   \startuseMPgraphic{RecursiveSumAlt}
@@ -210,7 +211,7 @@ on the whole easier, more maintainable and generally more pleasant.
   \stopitemize
 
   In addition to looking at designing a hardware description language, we
-  will also implement a prototype to test drive our ideas. This prototype will
+  will also implement a prototype to test ideas. This prototype will
   translate hardware descriptions written in the Haskell functional language
   to simple (netlist-like) hardware descriptions in the \VHDL language. The
   reasons for choosing these languages are detailed in section