\chapter[chap:description]{Hardware description}
- This chapter will provide an overview of the hardware description language
- that was created and the issues that have arisen in the process. It will
- focus on the issues of the language, not the implementation.
-
- When translating Haskell to hardware, we need to make choices in what kind
- of hardware to generate for what Haskell constructs. When faced with
- choices, we've tried to stick with the most obvious choice wherever
- possible. In a lot of cases, when you look at a hardware description it is
- comletely clear what hardware is described. We want our translator to
- generate exactly that hardware whenever possible, to minimize the amount of
- surprise for people working with it.
+ In this chapter an overview will be provided of the hardware
+ description language that was created and the issues that have arisen
+ in the process. The focus will be on the issues of the language, not
+ the implementation. The prototype implementation will be discussed in
+ \in{chapter}[chap:prototype].
+
+ To translate Haskell to hardware, every Haskell construct needs a
+ translation to \VHDL. There are often multiple valid translations
+ possible. When faced with choices, the most obvious choice has been
+ chosen wherever possible. In a lot of cases, when a programmer looks
+ at a functional hardware description it is completely clear what
+ hardware is described. We want our translator to generate exactly that
+ hardware whenever possible, to make working with Cλash as intuitive as
+ possible.
- In this chapter we try to describe how we interpret a Haskell program from a
+ \placeintermezzo{}{
+ \defref{reading examples}
+ \startframedtext[width=9cm,background=box,frame=no]
+ \startalignment[center]
+ {\tfa Reading the examples}
+ \stopalignment
+ \blank[medium]
+ In this thesis, a lot of functional code will be presented. Part of this
+ will be valid Cλash code, but others will just be small Haskell or Core
+ snippets to illustrate a concept.
+
+ In these examples, some functions and types will be used, without
+ properly defining every one of them. These functions (like \hs{and},
+ \hs{not}, \hs{add}, \hs{+}, etc.) and types (like \hs{Bit}, \hs{Word},
+ \hs{Bool}, etc.) are usually pretty self-explanatory.
+
+ The special type \hs{[t]} means \quote{list of \hs{t}'s}, where \hs{t}
+ can be any other type.
+
+ Of particular note is the use of the \hs{::} operator. It is used in
+ Haskell to explicitly declare the type of function or let binding. In
+ these examples and the text, we will occasionally use this operator to
+ show the type of arbitrary expressions, even where this would not
+ normally be valid. Just reading the \hs{::} operator as \quote{and also
+ note that \emph{this} expression has \emph{this} type} should work out.
+ \stopframedtext
+ }
+
+ In this chapter we describe how to interpret a Haskell program from a
hardware perspective. We provide a description of each Haskell language
element that needs translation, to provide a clear picture of what is
supported and how.
- \section{Function application}
- The basic syntactic element of a functional program are functions and
- function application. These have a single obvious \small{VHDL} translation: Each
- function becomes a hardware component, where each argument is an input port
- and the result value is the output port.
+
+ \section[sec:description:application]{Function application}
+ The basic syntactic elements of a functional program are functions and
+ function application. These have a single obvious \small{VHDL}
+ translation: each top level function becomes a hardware component, where each
+ argument is an input port and the result value is the (single) output
+ port. This output port can have a complex type (such as a tuple), so
+ having just a single output port does not pose a limitation.
Each function application in turn becomes component instantiation. Here, the
result of each argument expression is assigned to a signal, which is mapped
to the corresponding input port. The output port of the function is also
mapped to a signal, which is used as the result of the application.
- An example of a simple program using only function application would be:
+ Since every top level function generates its own component, the
+ hierarchy of of function calls is reflected in the final \VHDL\ output
+ as well, creating a hierarchical \VHDL\ description of the hardware.
+ This separation in different components makes the resulting \VHDL\
+ output easier to read and debug.
+
+ \in{Example}[ex:And3] shows a simple program using only function
+ application and the corresponding architecture.
+
+\startbuffer[And3]
+-- A simple function that returns
+-- conjunction of three bits
+and3 :: Bit -> Bit -> Bit -> Bit
+and3 a b c = and (and a b) c
+\stopbuffer
+
+ \startuseMPgraphic{And3}
+ save a, b, c, anda, andb, out;
+
+ % I/O ports
+ newCircle.a(btex $a$ etex) "framed(false)";
+ newCircle.b(btex $b$ etex) "framed(false)";
+ newCircle.c(btex $c$ etex) "framed(false)";
+ newCircle.out(btex $out$ etex) "framed(false)";
+
+ % Components
+ newCircle.anda(btex $and$ etex);
+ newCircle.andb(btex $and$ etex);
+
+ a.c = origin;
+ b.c = a.c + (0cm, 1cm);
+ c.c = b.c + (0cm, 1cm);
+ anda.c = midpoint(a.c, b.c) + (2cm, 0cm);
+ andb.c = midpoint(b.c, c.c) + (4cm, 0cm);
+
+ out.c = andb.c + (2cm, 0cm);
+
+ % Draw objects and lines
+ drawObj(a, b, c, anda, andb, out);
+
+ ncarc(a)(anda) "arcangle(-10)";
+ ncarc(b)(anda);
+ ncarc(anda)(andb);
+ ncarc(c)(andb);
+ ncline(andb)(out);
+ \stopuseMPgraphic
+
+ \startbuffer[And3VHDL]
+ entity and3Component_0 is
+ port (\azMyG2\ : in std_logic;
+ \bzMyI2\ : in std_logic;
+ \czMyK2\ : in std_logic;
+ \foozMySzMyS2\ : out std_logic;
+ clock : in std_logic;
+ resetn : in std_logic);
+ end entity and3Component_0;
+
+
+ architecture structural of and3Component_0 is
+ signal \argzMyMzMyM2\ : std_logic;
+ begin
+ \argzMyMzMyM2\ <= \azMyG2\ and \bzMyI2\;
+
+ \foozMySzMyS2\ <= \argzMyMzMyM2\ and \czMyK2\;
+ end architecture structural;
+ \stopbuffer
+
+ \placeexample[][ex:And3]{Simple three input and gate.}
+ \startcombination[2*1]
+ {\typebufferhs{And3}}{Haskell description using function applications.}
+ {\boxedgraphic{And3}}{The architecture described by the Haskell description.}
+ \stopcombination
+
+ \placeexample[][ex:And3VHDL]{\VHDL\ generated for \hs{and3} from \in{example}[ex:And3]}
+ {\typebuffervhdl{And3VHDL}}
+
+ \placeintermezzo{}{
+ \defref{top level binding}
+ \defref{top level binder}
+ \defref{top level function}
+ \startframedtext[width=8cm,background=box,frame=no]
+ \startalignment[center]
+ {\tfa Top level binders and functions}
+ \stopalignment
+ \blank[medium]
+ A \emph{top level binder} is any binder (variable) that is
+ declared in the \quote{global} scope of a Haskell program (as
+ opposed to a binder that is bound inside a function. The binder
+ together with its body is referred to as a \emph{top level
+ binding}.
+
+ In Haskell, there is no sharp distinction between a variable and a
+ function: a function is just a variable (binder) with a function
+ type. This means that a \emph{top level function} is just any top
+ level binder with a function type. This also means that sometimes
+ top level function will be used when top level binder is really
+ meant.
+
+ As an example, consider the following Haskell snippet:
+
+ \starthaskell
+ foo :: Int -> Int
+ foo x = inc x
+ where
+ inc = \y -> y + 1
+ \stophaskell
+
+ Here, \hs{foo} is a top level binder, whereas \hs{inc} is a
+ function (since it is bound to a lambda extraction, indicated by
+ the backslash) but is not a top level binder or function. Since
+ the type of \hs{foo} is a function type, namely \hs{Int -> Int},
+ it is also a top level function.
+ \stopframedtext
+ }
+ \section{Choice}
+ Although describing components and connections allows us to describe a lot of
+ hardware designs already, there is an obvious thing missing: choice. We
+ need some way to be able to choose between values based on another value.
+ In Haskell, choice is achieved by \hs{case} expressions, \hs{if}
+ expressions, pattern matching and guards.
+
+ An obvious way to add choice to our language without having to recognize
+ any of Haskell's syntax, would be to add a primitive \quote{\hs{if}}
+ function. This function would take three arguments: the condition, the
+ value to return when the condition is true and the value to return when
+ the condition is false.
+
+ This \hs{if} function would then essentially describe a multiplexer and
+ allows us to describe any architecture that uses multiplexers.
+
+ However, to be able to describe our hardware in a more convenient way, we
+ also want to translate Haskell's choice mechanisms. The easiest of these
+ are of course case expressions (and \hs{if} expressions, which can be very
+ directly translated to \hs{case} expressions). A \hs{case} expression can in turn
+ simply be translated to a conditional assignment, where the conditions use
+ equality comparisons against the constructors in the \hs{case} expressions.
+
+ In \in{example}[ex:Inv] two versions of an inverter are shown. The first
+ uses a simple \hs{case} expression, scrutinizing a Boolean value. The
+ corresponding architecture has a comparator to determine which of the
+ constructors is on the \hs{in} input. There is a multiplexer to select the
+ output signal (which is just a conditional assignment in the generated
+ \VHDL). The two options for the output signals are just constants,
+ but these could have been more complex expressions (in which case also
+ both of them would be working in parallel, regardless of which output
+ would be chosen eventually). The \VHDL\ generated for (both versions of)
+ this inverter is shown in \in{example}[ex:InvVHDL].
+
+ If we would translate a Boolean to a bit value, we could of course remove
+ the comparator and directly feed 'in' into the multiplexer (or even use an
+ inverter instead of a multiplexer). However, we will try to make a
+ general translation, which works for all possible \hs{case} expressions.
+ Optimizations such as these are left for the \VHDL\ synthesizer, which
+ handles them very well.
+
+ \placeintermezzo{}{
+ \startframedtext[width=8cm,background=box,frame=no]
+ \startalignment[center]
+ {\tfa Arguments / results vs. inputs / outputs}
+ \stopalignment
+ \blank[medium]
+ Due to the translation chosen for function application, there is a
+ very strong relation between arguments, results, inputs and outputs.
+ For clarity, the former two will always refer to the arguments and
+ results in the functional description (either Haskell or Core). The
+ latter two will refer to input and output ports in the generated
+ \VHDL.
+
+ Even though these concepts seem to be nearly identical, when stateful
+ functions are introduces we will see arguments and results that will
+ not get translated into input and output ports, making this
+ distinction more important.
+ \stopframedtext
+ }
+
+ A slightly more complex (but very powerful) form of choice is pattern
+ matching. A function can be defined in multiple clauses, where each clause
+ specifies a pattern. When the arguments match the pattern, the
+ corresponding clause will be used.
+
+ \in{Example}[ex:Inv] also shows an inverter that uses pattern matching.
+ The architecture it describes is of course the
+ same one as the description with a case expression. The general interpretation
+ of pattern matching is also similar to that of \hs{case} expressions: generate
+ hardware for each of the clauses (like each of the clauses of a \hs{case}
+ expression) and connect them to the function output through (a number of
+ nested) multiplexers. These multiplexers are driven by comparators and
+ other logic, that check each pattern in turn.
+
+ In these examples we have seen only binary case expressions and pattern
+ matches (\ie, with two alternatives). In practice, case expressions can
+ choose between more than two values, resulting in a number of nested
+ multiplexers.
+
+ \startbuffer[CaseInv]
+ inv :: Bool -> Bool
+ inv x = case x of
+ True -> False
+ False -> True
+ \stopbuffer
+
+ \startbuffer[PatternInv]
+ inv :: Bool -> Bool
+ inv True = False
+ inv False = True
+ \stopbuffer
+
+ \startuseMPgraphic{Inv}
+ save in, truecmp, falseout, trueout, out, cmp, mux;
+
+ % I/O ports
+ newCircle.in(btex $in$ etex) "framed(false)";
+ newCircle.out(btex $out$ etex) "framed(false)";
+ % Constants
+ newBox.truecmp(btex $True$ etex) "framed(false)";
+ newBox.trueout(btex $True$ etex) "framed(false)";
+ newBox.falseout(btex $False$ etex) "framed(false)";
+
+ % Components
+ newCircle.cmp(btex $==$ etex);
+ newMux.mux;
+
+ in.c = origin;
+ cmp.c = in.c + (3cm, 0cm);
+ truecmp.c = cmp.c + (-1cm, 1cm);
+ mux.sel = cmp.e + (1cm, -1cm);
+ falseout.c = mux.inpa - (2cm, 0cm);
+ trueout.c = mux.inpb - (2cm, 0cm);
+ out.c = mux.out + (2cm, 0cm);
+
+ % Draw objects and lines
+ drawObj(in, out, truecmp, trueout, falseout, cmp, mux);
+
+ ncline(in)(cmp);
+ ncarc(truecmp)(cmp);
+ nccurve(cmp.e)(mux.sel) "angleA(0)", "angleB(-90)";
+ ncline(falseout)(mux) "posB(inpa)";
+ ncline(trueout)(mux) "posB(inpb)";
+ ncline(mux)(out) "posA(out)";
+ \stopuseMPgraphic
+
+ \startbuffer[InvVHDL]
+ entity invComponent_0 is
+ port (\xzAMo2\ : in boolean;
+ \reszAMuzAMu2\ : out boolean;
+ clock : in std_logic;
+ resetn : in std_logic);
+ end entity invComponent_0;
+
+
+ architecture structural of invComponent_0 is
+ begin
+ \reszAMuzAMu2\ <= false when \xzAMo2\ = true else
+ true;
+ end architecture structural;
+ \stopbuffer
+
+ \placeexample[][ex:Inv]{Simple inverter.}{
+ % Use placesidebyside, since nesting combinations doesn't seem to work
+ % here. This does break centering, but well...
+ \placesidebyside
+ % Use 2*2 instead of 1*2 to insert some extra space (\placesidebyside
+ % places stuff very close together)
+ {\startcombination[2*2]
+ {\typebufferhs{CaseInv}}{Haskell description using a Case expression.}
+ {}{}
+ {\typebufferhs{PatternInv}}{Haskell description using Pattern matching expression.}
+ {}{}
+ \stopcombination}
+ % Use a 1*1 combination to add a caption
+ {\startcombination[1*1]
+ {\boxedgraphic{Inv}}{The architecture described by the Haskell descriptions.}
+ \stopcombination}
+ }
+
+% \placeexample[][ex:Inv]{Simple inverter.}{
+% \startcombination[2*2]
+% {\typebufferhs{CaseInv}}{Haskell description using a Case expression.}
+% {}{}
+% {\typebufferhs{PatternInv}}{Haskell description using Pattern matching expression.}
+% {\boxedgraphic{Inv}}{The architecture described by the Haskell description.}
+% \stopcombination
+% }
+ \placeexample[][ex:InvVHDL]{\VHDL\ generated for (both versions of) \hs{inv} from \in{example}[ex:Inv]}
+ {\typebuffervhdl{InvVHDL}}
+
+ \section{Types}
+ Translation of two most basic functional concepts has been
+ discussed: function application and choice. Before looking further
+ into less obvious concepts like higher-order expressions and
+ polymorphism, the possible types that can be used in hardware
+ descriptions will be discussed.
+
+ Some way is needed to translate every values used to its hardware
+ equivalents. In particular, this means a hardware equivalent for
+ every \emph{type} used in a hardware description is needed
+
+ Since most functional languages have a lot of standard types that
+ are hard to translate (integers without a fixed size, lists without
+ a static length, etc.), a number of \quote{built-in} types will be
+ defined first. These types are built-in in the sense that our
+ compiler will have a fixed VHDL type for these. User defined types,
+ on the other hand, will have their hardware type derived directly
+ from their Haskell declaration automatically, according to the rules
+ sketched here.
+
+ \todo{Introduce Haskell type syntax (type constructors, type application,
+ :: operator?)}
+
+ \subsection{Built-in types}
+ The language currently supports the following built-in types. Of these,
+ only the \hs{Bool} type is supported by Haskell out of the box (the
+ others are defined by the Cλash package, so they are user-defined types
+ from Haskell's point of view).
+
+ \startdesc{\hs{Bit}}
+ This is the most basic type available. It is mapped directly onto
+ the \type{std_logic} \small{VHDL} type. Mapping this to the
+ \type{bit} type might make more sense (since the Haskell version
+ only has two values), but using \type{std_logic} is more standard
+ (and allowed for some experimentation with don't care values)
+
+ \todo{Sidenote bit vs stdlogic}
+ \stopdesc
+ \startdesc{\hs{Bool}}
+ This is the only built-in Haskell type supported and is translated
+ exactly like the Bit type (where a value of \hs{True} corresponds to a
+ value of \hs{High}). Supporting the Bool type is particularly
+ useful to support \hs{if ... then ... else ...} expressions, which
+ always have a \hs{Bool} value for the condition.
+
+ A \hs{Bool} is translated to a \type{std_logic}, just like \hs{Bit}.
+ \stopdesc
+ \startdesc{\hs{SizedWord}, \hs{SizedInt}}
+ These are types to represent integers. A \hs{SizedWord} is unsigned,
+ while a \hs{SizedInt} is signed. These types are parametrized by a
+ length type, so you can define an unsigned word of 32 bits wide as
+ follows:
+
+ \starthaskell
+ type Word32 = SizedWord D32
+ \stophaskell
+
+ Here, a type synonym \hs{Word32} is defined that is equal to the
+ \hs{SizedWord} type constructor applied to the type \hs{D32}. \hs{D32}
+ is the \emph{type level representation} of the decimal number 32,
+ making the \hs{Word32} type a 32-bit unsigned word.
+
+ These types are translated to the \small{VHDL} \type{unsigned} and
+ \type{signed} respectively.
+ \todo{Sidenote on dependent typing?}
+ \stopdesc
+ \startdesc{\hs{Vector}}
+ This is a vector type, that can contain elements of any other type and
+ has a fixed length. It has two type parameters: its
+ length and the type of the elements contained in it. By putting the
+ length parameter in the type, the length of a vector can be determined
+ at compile time, instead of only at run-time for conventional lists.
+
+ The \hs{Vector} type constructor takes two type arguments: the length
+ of the vector and the type of the elements contained in it. The state
+ type of an 8 element register bank would then for example be:
+
+ \starthaskell
+ type RegisterState = Vector D8 Word32
+ \stophaskell
+
+ Here, a type synonym \hs{RegisterState} is defined that is equal to
+ the \hs{Vector} type constructor applied to the types \hs{D8} (The type
+ level representation of the decimal number 8) and \hs{Word32} (The 32
+ bit word type as defined above). In other words, the
+ \hs{RegisterState} type is a vector of 8 32-bit words.
+
+ A fixed size vector is translated to a \small{VHDL} array type.
+ \stopdesc
+ \startdesc{\hs{RangedWord}}
+ This is another type to describe integers, but unlike the previous
+ two it has no specific bit-width, but an upper bound. This means that
+ its range is not limited to powers of two, but can be any number.
+ A \hs{RangedWord} only has an upper bound, its lower bound is
+ implicitly zero. There is a lot of added implementation complexity
+ when adding a lower bound and having just an upper bound was enough
+ for the primary purpose of this type: type-safely indexing vectors.
+
+ To define an index for the 8 element vector above, we would do:
+
+ \starthaskell
+ type RegisterIndex = RangedWord D7
+ \stophaskell
+
+ Here, a type synonym \hs{RegisterIndex} is defined that is equal to
+ the \hs{RangedWord} type constructor applied to the type \hs{D7}. In
+ other words, this defines an unsigned word with values from
+ {\definedfont[Serif*normalnum]0 to 7} (inclusive). This word can be be used to index the
+ 8 element vector \hs{RegisterState} above.
+
+ This type is translated to the \type{unsigned} \small{VHDL} type.
+ \stopdesc
- \starthaskell
- -- | A simple function that returns the and of three bits
- and3 :: Bit -> Bit -> Bit -> Bit
- and3 a b c = and (and a b) c
- \stophaskell
+ The integer and vector built-in types are discussed in more detail
+ in \cite[baaij09].
+
+ \subsection{User-defined types}
+ There are three ways to define new types in Haskell: algebraic
+ data-types with the \hs{data} keyword, type synonyms with the \hs{type}
+ keyword and type renamings with the \hs{newtype} keyword. \GHC\
+ offers a few more advanced ways to introduce types (type families,
+ existential typing, \small{GADT}s, etc.) which are not standard
+ Haskell. These will be left outside the scope of this research.
+
+ Only an algebraic datatype declaration actually introduces a
+ completely new type, for which we provide the \VHDL\ translation
+ below. Type synonyms and renamings only define new names for
+ existing types (where synonyms are completely interchangeable and
+ renamings need explicit conversion). Therefore, these do not need
+ any particular \VHDL\ translation, a synonym or renamed type will
+ just use the same representation as the original type. The
+ distinction between a renaming and a synonym does no longer matter
+ in hardware and can be disregarded in the generated \VHDL.
+
+ For algebraic types, we can make the following distinction:
+
+ \startdesc{Product types}
+ A product type is an algebraic datatype with a single constructor with
+ two or more fields, denoted in practice like (a,b), (a,b,c), etc. This
+ is essentially a way to pack a few values together in a record-like
+ structure. In fact, the built-in tuple types are just algebraic product
+ types (and are thus supported in exactly the same way).
+
+ The \quote{product} in its name refers to the collection of values belonging
+ to this type. The collection for a product type is the Cartesian
+ product of the collections for the types of its fields.
+
+ These types are translated to \VHDL\ record types, with one field for
+ every field in the constructor. This translation applies to all single
+ constructor algebraic data-types, including those with just one
+ field (which are technically not a product, but generate a VHDL
+ record for implementation simplicity).
+ \stopdesc
+ \startdesc{Enumerated types}
+ \defref{enumerated types}
+ An enumerated type is an algebraic datatype with multiple constructors, but
+ none of them have fields. This is essentially a way to get an
+ enumeration-like type containing alternatives.
+
+ Note that Haskell's \hs{Bool} type is also defined as an
+ enumeration type, but we have a fixed translation for that.
+
+ These types are translated to \VHDL\ enumerations, with one value for
+ each constructor. This allows references to these constructors to be
+ translated to the corresponding enumeration value.
+ \stopdesc
+ \startdesc{Sum types}
+ A sum type is an algebraic datatype with multiple constructors, where
+ the constructors have one or more fields. Technically, a type with
+ more than one field per constructor is a sum of products type, but
+ for our purposes this distinction does not really make a
+ difference, so this distinction is note made.
+
+ The \quote{sum} in its name refers again to the collection of values
+ belonging to this type. The collection for a sum type is the
+ union of the the collections for each of the constructors.
+
+ Sum types are currently not supported by the prototype, since there is
+ no obvious \VHDL\ alternative. They can easily be emulated, however, as
+ we will see from an example:
+
+ \starthaskell
+ data Sum = A Bit Word | B Word
+ \stophaskell
+
+ An obvious way to translate this would be to create an enumeration to
+ distinguish the constructors and then create a big record that
+ contains all the fields of all the constructors. This is the same
+ translation that would result from the following enumeration and
+ product type (using a tuple for clarity):
+
+ \starthaskell
+ data SumC = A | B
+ type Sum = (SumC, Bit, Word, Word)
+ \stophaskell
+
+ Here, the \hs{SumC} type effectively signals which of the latter three
+ fields of the \hs{Sum} type are valid (the first two if \hs{A}, the
+ last one if \hs{B}), all the other ones have no useful value.
+
+ An obvious problem with this naive approach is the space usage: the
+ example above generates a fairly big \VHDL\ type. Since we can be
+ sure that the two \hs{Word}s in the \hs{Sum} type will never be valid
+ at the same time, this is a waste of space.
+
+ Obviously, duplication detection could be used to reuse a
+ particular field for another constructor, but this would only
+ partially solve the problem. If two fields would be, for
+ example, an array of 8 bits and an 8 bit unsigned word, these are
+ different types and could not be shared. However, in the final
+ hardware, both of these types would simply be 8 bit connections,
+ so we have a 100\% size increase by not sharing these.
+ \stopdesc
- This results in the following hardware:
-
- TODO: Pretty picture
+ Another interesting case is that of recursive types. In Haskell, an
+ algebraic datatype can be recursive: any of its field types can be (or
+ contain) the type being defined. The most well-known recursive type is
+ probably the list type, which is defined is:
+
+ \starthaskell
+ data List t = Empty | Cons t (List t)
+ \stophaskell
+
+ Note that \hs{Empty} is usually written as \hs{[]} and \hs{Cons} as
+ \hs{:}, but this would make the definition harder to read. This
+ immediately shows the problem with recursive types: what hardware type
+ to allocate here?
+
+ If the naive approach for sum types described above would be used,
+ a record would be created where the first field is an enumeration
+ to distinguish \hs{Empty} from \hs{Cons}. Furthermore, two more
+ fields would be added: one with the (\VHDL\ equivalent of) type
+ \hs{t} (assuming this type is actually known at compile time, this
+ should not be a problem) and a second one with type \hs{List t}.
+ The latter one is of course a problem: this is exactly the type
+ that was to be translated in the first place.
+
+ The resulting \VHDL\ type will thus become infinitely deep. In
+ other words, there is no way to statically determine how long
+ (deep) the list will be (it could even be infinite).
+
+ In general, recursive types can never be properly translated: all
+ recursive types have a potentially infinite value (even though in
+ practice they will have a bounded value, there is no way for the
+ compiler to automatically determine an upper bound on its size).
\subsection{Partial application}
- It should be obvious that we cannot generate hardware signals for all
- expressions we can express in Haskell. The most obvious criterium for this
- is the type of an expression. We will see more of this below, but for now it
- should be obvious that any expression of a function type cannot be
- represented as a signal or i/o port to a component.
-
- From this, we can see that the above translation rules do not apply to a
- partial application. Let's look at an example:
-
- \starthaskell
- -- | Multiply the input word by four.
- quadruple :: Word -> Word
- quadruple n = mul (mul n)
- where
- mul = (*) 2
- \stophaskell
-
- It should be clear that the above code describes the following hardware:
-
- TODO: Pretty picture
-
- Here, the definition of mul is a partial function application: It applies
- \hs{2 :: Word} to the function \hs{(*) :: Word -> Word -> Word} resulting in
- the expression \hs{(*) 2 :: Word -> Word}. Since this resulting expression
- is again a function, we can't generate hardware for it directly. This is
- because the hardware to generate for \hs{mul} depends completely on where
- and how it is used. In this example, it is even used twice!
-
- However, it is clear that the above hardware description actually describes
- valid hardware. In general, we can see that any partial applied function
- must eventually become completely applied, at which point we can generate
- hardware for it using the rules for function application above. It might
- mean that a partial application is passed around quite a bit (even beyond
- function boundaries), but eventually, the partial application will become
- completely applied.
+ Now the translation of application, choice and types has been
+ discussed, a more complex concept can be considered: partial
+ applications. A \emph{partial application} is any application whose
+ (return) type is (again) a function type.
+
+ From this, it should be clear that the translation rules for full
+ application does not apply to a partial application: there are not
+ enough values for all the input ports in the resulting \VHDL.
+ \in{Example}[ex:Quadruple] shows an example use of partial application
+ and the corresponding architecture.
+
+\startbuffer[Quadruple]
+-- Multiply the input word by four.
+quadruple :: Word -> Word
+quadruple n = mul (mul n)
+ where
+ mul = (*) 2
+\stopbuffer
+
+ \startuseMPgraphic{Quadruple}
+ save in, two, mula, mulb, out;
+
+ % I/O ports
+ newCircle.in(btex $n$ etex) "framed(false)";
+ newCircle.two(btex $2$ etex) "framed(false)";
+ newCircle.out(btex $out$ etex) "framed(false)";
+
+ % Components
+ newCircle.mula(btex $\times$ etex);
+ newCircle.mulb(btex $\times$ etex);
+
+ two.c = origin;
+ in.c = two.c + (0cm, 1cm);
+ mula.c = in.c + (2cm, 0cm);
+ mulb.c = mula.c + (2cm, 0cm);
+ out.c = mulb.c + (2cm, 0cm);
+
+ % Draw objects and lines
+ drawObj(in, two, mula, mulb, out);
+
+ nccurve(two)(mula) "angleA(0)", "angleB(45)";
+ nccurve(two)(mulb) "angleA(0)", "angleB(45)";
+ ncline(in)(mula);
+ ncline(mula)(mulb);
+ ncline(mulb)(out);
+ \stopuseMPgraphic
+
+ \placeexample[][ex:Quadruple]{Simple three port and.}
+ \startcombination[2*1]
+ {\typebufferhs{Quadruple}}{Haskell description using function applications.}
+ {\boxedgraphic{Quadruple}}{The architecture described by the Haskell description.}
+ \stopcombination
+
+ Here, the definition of mul is a partial function application: it applies
+ the function \hs{(*) :: Word -> Word -> Word} to the value \hs{2 :: Word},
+ resulting in the expression \hs{(*) 2 :: Word -> Word}. Since this resulting
+ expression is again a function, hardware cannot be generated for it
+ directly. This is because the hardware to generate for \hs{mul}
+ depends completely on where and how it is used. In this example, it is
+ even used twice.
+
+ However, it is clear that the above hardware description actually
+ describes valid hardware. In general, any partial applied function
+ must eventually become completely applied, at which point hardware for
+ it can be generated using the rules for function application given in
+ \in{section}[sec:description:application]. It might mean that a
+ partial application is passed around quite a bit (even beyond function
+ boundaries), but eventually, the partial application will become
+ completely applied. An example of this principle is given in
+ \in{section}[sec:normalization:defunctionalization].
+
+ \section{Costless specialization}
+ Each (complete) function application in our description generates a
+ component instantiation, or a specific piece of hardware in the final
+ design. It is interesting to note that each application of a function
+ generates a \emph{separate} piece of hardware. In the final design, none
+ of the hardware is shared between applications, even when the applied
+ function is the same (of course, if a particular value, such as the result
+ of a function application, is used twice, it is not calculated twice).
+
+ This is distinctly different from normal program compilation: two separate
+ calls to the same function share the same machine code. Having more
+ machine code has implications for speed (due to less efficient caching)
+ and memory usage. For normal compilation, it is therefore important to
+ keep the amount of functions limited and maximize the code sharing
+ (though there is a trade-off between speed and memory usage here).
+
+ When generating hardware, this is hardly an issue. Having more \quote{code
+ sharing} does reduce the amount of \small{VHDL} output (Since different
+ component instantiations still share the same component), but after
+ synthesis, the amount of hardware generated is not affected. This
+ means there is no trade-off between speed and memory (or rather,
+ chip area) usage.
+
+ In particular, if we would duplicate all functions so that there is a
+ separate function for every application in the program (\eg, each function
+ is then only applied exactly once), there would be no increase in hardware
+ size whatsoever.
+
+ Because of this, a common optimization technique called
+ \emph{specialization} can be applied to hardware generation without any
+ performance or area cost (unlike for software).
+
+ \fxnote{Perhaps these next three sections are a bit too
+ implementation-oriented?}
+
+ \subsection{Specialization}
+ \defref{specialization}
+ Given some function that has a \emph{domain} $D$ (\eg, the set of
+ all possible arguments that the function could be applied to), we
+ create a specialized function with exactly the same behavior, but
+ with a domain $D' \subset D$. This subset can be chosen in all
+ sorts of ways. Any subset is valid for the general definition of
+ specialization, but in practice only some of them provide useful
+ optimization opportunities.
+
+ Common subsets include limiting a polymorphic argument to a single type
+ (\ie, removing polymorphism) or limiting an argument to just a single
+ value (\ie, cross-function constant propagation, effectively removing
+ the argument).
+
+ Since we limit the argument domain of the specialized function, its
+ definition can often be optimized further (since now more types or even
+ values of arguments are already known). By replacing any application of
+ the function that falls within the reduced domain by an application of
+ the specialized version, the code gets faster (but the code also gets
+ bigger, since we now have two versions instead of one). If we apply
+ this technique often enough, we can often replace all applications of a
+ function by specialized versions, allowing the original function to be
+ removed (in some cases, this can even give a net reduction of the code
+ compared to the non-specialized version).
+
+ Specialization is useful for our hardware descriptions for functions
+ that contain arguments that cannot be translated to hardware directly
+ (polymorphic or higher-order arguments, for example). If we can create
+ specialized functions that remove the argument, or make it translatable,
+ we can use specialization to make the original, untranslatable, function
+ obsolete.
+
+ \section{Higher order values}
+ What holds for partial application, can be easily generalized to any
+ higher-order expression. This includes partial applications, plain
+ variables (e.g., a binder referring to a top level function), lambda
+ expressions and more complex expressions with a function type (a \hs{case}
+ expression returning lambda's, for example).
+
+ Each of these values cannot be directly represented in hardware (just like
+ partial applications). Also, to make them representable, they need to be
+ applied: function variables and partial applications will then eventually
+ become complete applications, applied lambda expressions disappear by
+ applying β-reduction, etc.
+
+ So any higher-order value will be \quote{pushed down} towards its
+ application just like partial applications. Whenever a function boundary
+ needs to be crossed, the called function can be specialized.
+
+ \fxnote{This section needs improvement and an example}
+
+ \section{Polymorphism}
+ In Haskell, values can be \emph{polymorphic}: they can have multiple types. For
+ example, the function \hs{fst :: (a, b) -> a} is an example of a
+ polymorphic function: it works for tuples with any two element types. Haskell
+ type classes allow a function to work on a specific set of types, but the
+ general idea is the same. The opposite of this is a \emph{monomorphic}
+ value, which has a single, fixed, type.
+
+% A type class is a collection of types for which some operations are
+% defined. It is thus possible for a value to be polymorphic while having
+% any number of \emph{class constraints}: the value is not defined for
+% every type, but only for types in the type class. An example of this is
+% the \hs{even :: (Integral a) => a -> Bool} function, which can map any
+% value of a type that is member of the \hs{Integral} type class
+
+ When generating hardware, polymorphism cannot be easily translated. How
+ many wires will you lay down for a value that could have any type? When
+ type classes are involved, what hardware components will you lay down for
+ a class method (whose behavior depends on the type of its arguments)?
+ Note that Cλash currently does not allow user-defined type classes,
+ but does partly support some of the built-in type classes (like \hs{Num}).
+
+ Fortunately, we can again use the principle of specialization: since every
+ function application generates a separate piece of hardware, we can know
+ the types of all arguments exactly. Provided that existential typing
+ (which is a \GHC\ extension) is not used typing, all of the
+ polymorphic types in a function must depend on the types of the
+ arguments (In other words, the only way to introduce a type variable
+ is in a lambda abstraction).
+
+ If a function is monomorphic, all values inside it are monomorphic as
+ well, so any function that is applied within the function can only be
+ applied to monomorphic values. The applied functions can then be
+ specialized to work just for these specific types, removing the
+ polymorphism from the applied functions as well.
+
+ \defref{entry function}The entry function must not have a
+ polymorphic type (otherwise no hardware interface could be generated
+ for the entry function).
+
+ By induction, this means that all functions that are (indirectly) called
+ by our top level function (meaning all functions that are translated in
+ the final hardware) become monomorphic.
\section{State}
- \subsection{Introduction}
- Provide some examples
-
+ A very important concept in hardware designs is \emph{state}. In a
+ stateless (or, \emph{combinational}) design, every output is directly and solely dependent on the
+ inputs. In a stateful design, the outputs can depend on the history of
+ inputs, or the \emph{state}. State is usually stored in \emph{registers},
+ which retain their value during a clock cycle, and are typically updated at
+ the start of every clock cycle. Since the updating of the state is tightly
+ coupled (synchronized) to the clock signal, these state updates are often
+ called \emph{synchronous} behavior.
+
+ \todo{Sidenote? Registers can contain any (complex) type}
+
+ To make Cλash useful to describe more than simple combinational
+ designs, it needs to be able to describe state in some way.
\subsection{Approaches to state}
- Explain impact of state (or rather, temporal behaviour) on function signature.
- \subsubsection{Stream arguments and results}
- \subsubsection{Explicit state arguments and results}
- Nested state for called functions.
+ In Haskell, functions are always pure (except when using unsafe
+ functions with the \hs{IO} monad, which is not supported by Cλash). This
+ means that the output of a function solely depends on its inputs. If you
+ evaluate a given function with given inputs, it will always provide the
+ same output.
+
+ \placeintermezzo{}{
+ \defref{purity}
+ \startframedtext[width=8cm,background=box,frame=no]
+ \startalignment[center]
+ {\tfa Purity}
+ \stopalignment
+ \blank[medium]
+
+ A function is said to be pure if it satisfies two conditions:
+
+ \startitemize[KR]
+ \item When a pure function is called with the same arguments twice, it should
+ return the same value in both cases.
+ \item When a pure function is called, it should have not
+ observable side-effects.
+ \stopitemize
+
+ Purity is an important property in functional languages, since
+ it enables all kinds of mathematical reasoning and
+ optimizations with pure functions, that are not guaranteed to
+ be correct for impure functions.
+
+ An example of a pure function is the square root function
+ \hs{sqrt}. An example of an impure function is the \hs{today}
+ function that returns the current date (which of course cannot
+ exist like this in Haskell).
+ \stopframedtext
+ }
+
+ This is a perfect match for a combinational circuit, where the output
+ also solely depends on the inputs. However, when state is involved, this
+ no longer holds. Of course this purity constraint cannot just be
+ removed from Haskell. But even when designing a completely new (hardware
+ description) language, it does not seem to be a good idea to
+ remove this purity. This would that all kinds of interesting properties of
+ the functional language get lost, and all kinds of transformations
+ and optimizations are no longer be meaning preserving.
+
+ So our functions must remain pure, meaning the current state has
+ to be present in the function's arguments in some way. There seem
+ to be two obvious ways to do this: adding the current state as an
+ argument, or including the full history of each argument.
- \subsection{Explicit state specification}
- Note about semantic correctness of top level state.
-
- Note about automatic ``down-pushing'' of state.
-
- Note about explicit state specification as the best solution.
-
- Note about substates
-
- Note about conditions on state variables and checking them.
-
- \subsection{Explicit state implementation}
- Recording state variables at the type level.
-
- Ideal: Type synonyms, since there is no additional code overhead for
- packing and unpacking. Downside: there is no explicit conversion in Core
- either, so type synonyms tend to get lost in expressions (they can be
- preserved in binders, but this makes implementation harder, since that
- statefulness of a value must be manually tracked).
-
- Less ideal: Newtype. Requires explicit packing and unpacking of function
- arguments. If you don't unpack substates, there is no overhead for
- (un)packing substates. This will result in many nested State constructors
- in a nested state type. \eg:
+ \subsubsection{Stream arguments and results}
+ Including the entire history of each input (\eg, the value of that
+ input for each previous clock cycle) is an obvious way to make outputs
+ depend on all previous input. This is easily done by making every
+ input a list instead of a single value, containing all previous values
+ as well as the current value.
+
+ An obvious downside of this solution is that on each cycle, all the
+ previous cycles must be resimulated to obtain the current state. To do
+ this, it might be needed to have a recursive helper function as well,
+ which might be hard to be properly analyzed by the compiler.
+
+ A slight variation on this approach is one taken by some of the other
+ functional \small{HDL}s in the field: \todo{References to Lava,
+ ForSyDe, ...} Make functions operate on complete streams. This means
+ that a function is no longer called on every cycle, but just once. It
+ takes stream as inputs instead of values, where each stream contains
+ all the values for every clock cycle since system start. This is easily
+ modeled using an (infinite) list, with one element for each clock
+ cycle. Since the function is only evaluated once, its output must also
+ be a stream. Note that, since we are working with infinite lists and
+ still want to be able to simulate the system cycle-by-cycle, this
+ relies heavily on the lazy semantics of Haskell.
+
+ Since our inputs and outputs are streams, all other (intermediate)
+ values must be streams. All of our primitive operators (\eg, addition,
+ subtraction, bit-wise operations, etc.) must operate on streams as
+ well (note that changing a single-element operation to a stream
+ operation can done with \hs{map}, \hs{zipwith}, etc.).
+
+ This also means that primitive operations from an existing
+ language such as Haskell cannot be used directly (including some
+ syntax constructs, like \hs{case} expressions and \hs{if}
+ expressions). This makes this approach well suited for use in
+ \small{EDSL}s, since those already impose these same
+ limitations. \refdef{EDSL}
+
+ Note that the concept of \emph{state} is no more than having some way
+ to communicate a value from one cycle to the next. By introducing a
+ \hs{delay} function, we can do exactly that: delay (each value in) a
+ stream so that we can "look into" the past. This \hs{delay} function
+ simply outputs a stream where each value is the same as the input
+ value, but shifted one cycle. This causes a \quote{gap} at the
+ beginning of the stream: what is the value of the delay output in the
+ first cycle? For this, the \hs{delay} function has a second input, of
+ which only a single value is used.
+
+ \in{Example}[ex:DelayAcc] shows a simple accumulator expressed in this
+ style.
+
+\startbuffer[DelayAcc]
+acc :: Stream Word -> Stream Word
+acc in = out
+ where
+ out = (delay out 0) + in
+\stopbuffer
+
+\startuseMPgraphic{DelayAcc}
+ save in, out, add, reg;
+
+ % I/O ports
+ newCircle.in(btex $in$ etex) "framed(false)";
+ newCircle.out(btex $out$ etex) "framed(false)";
+
+ % Components
+ newReg.reg("") "dx(4mm)", "dy(6mm)", "reflect(true)";
+ newCircle.add(btex + etex);
+
+ in.c = origin;
+ add.c = in.c + (2cm, 0cm);
+ out.c = add.c + (2cm, 0cm);
+ reg.c = add.c + (0cm, 2cm);
- \starttyping
- State (State Bit, State (State Word, Bit), Word)
- \stoptyping
+ % Draw objects and lines
+ drawObj(in, out, add, reg);
- Alternative: Provide different newtypes for input and output state. This
- makes the code even more explicit, and typechecking can find even more
- errors. However, this requires defining two type synomyms for each
- stateful function instead of just one. \eg:
- \starttyping
- type AccumStateIn = StateIn Bit
- type AccumStateOut = StateOut Bit
- \stoptyping
- This also increases the possibility of having different input and output
- states. Checking for identical input and output state types is also
- harder, since each element in the state must be unpacked and compared
- separately.
+ nccurve(add)(reg) "angleA(0)", "angleB(180)", "posB(d)";
+ nccurve(reg)(add) "angleA(180)", "angleB(-45)", "posA(out)";
+ ncline(in)(add);
+ ncline(add)(out);
+\stopuseMPgraphic
- Alternative: Provide a type for the entire result type of a stateful
- function, not just the state part. \eg:
- \starttyping
- newtype Result state result = Result (state, result)
- \stoptyping
-
- This makes it easy to say "Any stateful function must return a
- \type{Result} type, without having to sort out result from state. However,
- this either requires a second type for input state (similar to
- \type{StateIn} / \type{StateOut} above), or requires the compiler to
- select the right argument for input state by looking at types (which works
- for complex states, but when that state has the same type as an argument,
- things get ambiguous) or by selecting a fixed (\eg, the last) argument,
- which might be limiting.
-
- \subsubsection{Example}
- As an example of the used approach, a simple averaging circuit, that lets
- the accumulation of the inputs be done by a subcomponent.
-
- \starttyping
- newtype State s = State s
-
- type AccumState = State Bit
- accum :: Word -> AccumState -> (AccumState, Word)
- accum i (State s) = (State (s + i), s + i)
-
- type AvgState = (AccumState, Word)
- avg :: Word -> AvgState -> (AvgState, Word)
- avg i (State s) = (State s', o)
- where
- (accums, count) = s
- -- Pass our input through the accumulator, which outputs a sum
- (accums', sum) = accum i accums
- -- Increment the count (which will be our new state)
- count' = count + 1
- -- Compute the average
- o = sum / count'
- s' = (accums', count')
- \stoptyping
-
- And the normalized, core-like versions:
-
- \starttyping
- accum i spacked = res
- where
- s = case spacked of (State s) -> s
- s' = s + i
- spacked' = State s'
- o = s + i
- res = (spacked', o)
+ \placeexample[][ex:DelayAcc]{Simple accumulator architecture.}
+ \startcombination[2*1]
+ {\typebufferhs{DelayAcc}}{Haskell description using streams.}
+ {\boxedgraphic{DelayAcc}}{The architecture described by the Haskell description.}
+ \stopcombination
- avg i spacked = res
- where
- s = case spacked of (State s) -> s
- accums = case s of (accums, \_) -> accums
- count = case s of (\_, count) -> count
- accumres = accum i accums
- accums' = case accumres of (accums', \_) -> accums'
- sum = case accumres of (\_, sum) -> sum
- count' = count + 1
- o = sum / count'
- s' = (accums', count')
- spacked' = State s'
- res = (spacked', o)
- \stoptyping
-
-
-
- As noted above, any component of a function's state that is a substate,
- \eg passed on as the state of another function, should have no influence
- on the hardware generated for the calling function. Any state-specific
- \small{VHDL} for this component can be generated entirely within the called
- function. So,we can completely leave out substates from any function.
-
- From this observation, we might think to remove the substates from a
- function's states alltogether, and leave only the state components which
- are actual states of the current function. While doing this would not
- remove any information needed to generate \small{VHDL} from the function, it would
- cause the function definition to become invalid (since we won't have any
- substate to pass to the functions anymore). We could solve the syntactic
- problems by passing \type{undefined} for state variables, but that would
- still break the code on the semantic level (\ie, the function would no
- longer be semantically equivalent to the original input).
-
- To keep the function definition correct until the very end of the process,
- we will not deal with (sub)states until we get to the \small{VHDL} generation.
- Here, we are translating from Core to \small{VHDL}, and we can simply not generate
- \small{VHDL} for substates, effectively removing the substate components
- alltogether.
-
- There are a few important points when ignore substates.
-
- First, we have to have some definition of "substate". Since any state
- argument or return value that represents state must be of the \type{State}
- type, we can simply look at its type. However, we must be careful to
- ignore only {\em substates}, and not a function's own state.
-
- In the example above, this means we should remove \type{accums'} from
- \type{s'}, but not throw away \type{s'} entirely. We should, however,
- remove \type{s'} from the output port of the function, since the state
- will be handled by a \small{VHDL} procedure within the function.
-
- When looking at substates, these can appear in two places: As part of an
- argument and as part of a return value. As noted above, these substates
- can only be used in very specific ways.
-
- \desc{State variables can appear as an argument.} When generating \small{VHDL}, we
- completely ignore the argument and generate no input port for it.
-
- \desc{State variables can be extracted from other state variables.} When
- extracting a state variable from another state variable, this always means
- we're extracting a substate, which we can ignore. So, we simply generate no
- \small{VHDL} for any extraction operation that has a state variable as a result.
-
- \desc{State variables can be passed to functions.} When passing a
- state variable to a function, this always means we're passing a substate
- to a subcomponent. The entire argument can simply be ingored in the
- resulting port map.
-
- \desc{State variables can be returned from functions.} When returning a
- state variable from a function (probably as a part of an algebraic
- datatype), this always mean we're returning a substate from a
- subcomponent. The entire state variable should be ignored in the resulting
- port map. The type binder of the binder that the function call is bound
- to should not include the state type either.
-
- \startdesc{State variables can be inserted into other variables.} When inserting
- a state variable into another variable (usually by constructing that new
- variable using its constructor), we can identify two cases:
-
- \startitemize
- \item The state is inserted into another state variable. In this case,
- the inserted state is a substate, and can be safely left out of the
- constructed variable.
- \item The state is inserted into a non-state variable. This happens when
- building up the return value of a function, where you put state and
- retsult variables together in an algebraic type (usually a tuple). In
- this case, we should leave the state variable out as well, since we
- don't want it to be included as an output port.
- \stopitemize
- So, in both cases, we can simply leave out the state variable from the
- resulting value. In the latter case, however, we should generate a state
- proc instead, which assigns the state variable to the input state variable
- at each clock tick.
- \stopdesc
-
- \desc{State variables can appear as (part of) a function result.} When
- generating \small{VHDL}, we can completely ignore any part of a function result
- that has a state type. If the entire result is a state type, this will
- mean the entity will not have an output port. Otherwise, the state
- elements will be removed from the type of the output port.
-
-
- Now, we know how to handle each use of a state variable separately. If we
- look at the whole, we can conclude the following:
-
- \startitemize
- \item A state unpack operation should not generate any \small{VHDL}. The binder
- to which the unpacked state is bound should still be declared, this signal
- will become the register and will hold the current state.
- \item A state pack operation should not generate any \small{VHDL}. The binder th
- which the packed state is bound should not be declared. The binder that is
- packed is the signal that will hold the new state.
- \item Any values of a State type should not be translated to \small{VHDL}. In
- particular, State elements should be removed from tuples (and other
- datatypes) and arguments with a state type should not generate ports.
- \item To make the state actually work, a simple \small{VHDL} proc should be
- generated. This proc updates the state at every clockcycle, by assigning
- the new state to the current state. This will be recognized by synthesis
- tools as a register specification.
- \stopitemize
+ This notation can be confusing (especially due to the loop in the
+ definition of out), but is essentially easy to interpret. There is a
+ single call to delay, resulting in a circuit with a single register,
+ whose input is connected to \hs{out} (which is the output of the
+ adder), and its output is the expression \hs{delay out 0} (which is
+ connected to one of the adder inputs).
+ \subsubsection{Explicit state arguments and results}
+ A more explicit way to model state, is to simply add an extra argument
+ containing the current state value. This allows an output to depend on
+ both the inputs as well as the current state while keeping the
+ function pure (letting the result depend only on the arguments), since
+ the current state is now an argument.
+
+ In Haskell, this would look like
+ \in{example}[ex:ExplicitAcc]\footnote[notfinalsyntax]{This
+ example is not in the final Cλash syntax}. \todo{Referencing
+ notfinalsyntax from Introduction.tex doesn't work}
+
+\startbuffer[ExplicitAcc]
+-- input -> current state -> (new state, output)
+acc :: Word -> Word -> (Word, Word)
+acc in s = (s', out)
+ where
+ out = s + in
+ s' = out
+\stopbuffer
+
+ \placeexample[][ex:ExplicitAcc]{Simple accumulator architecture.}
+ \startcombination[2*1]
+ {\typebufferhs{ExplicitAcc}}{Haskell description using explicit state arguments.}
+ % Picture is identical to the one we had just now.
+ {\boxedgraphic{DelayAcc}}{The architecture described by the Haskell description.}
+ \stopcombination
+
+ This approach makes a function's state very explicit, which state
+ variables are used by a function can be completely determined from its
+ type signature (as opposed to the stream approach, where a function
+ looks the same from the outside, regardless of what state variables it
+ uses or whether it is stateful at all).
+
+ This approach to state has been one of the initial drives behind
+ this research. Unlike a stream based approach it is well suited
+ to completely use existing code and language features (like
+ \hs{if} and \hs{case} expressions) because it operates on normal
+ values. Because of these reasons, this is the approach chosen
+ for Cλash. It will be examined more closely below.
- When applying these rules to the example program (in normal form), we will
- get the following result. All the parts that don't generate any value are
- crossed out, leaving some very boring assignments here and there.
-
+ \subsection{Explicit state specification}
+ The concept of explicit state has been introduced with some
+ examples above, but what are the implications of this approach?
+
+ \subsubsection{Substates}
+ Since a function's state is reflected directly in its type signature,
+ if a function calls other stateful functions (\eg, has sub-circuits), it
+ has to somehow know the current state for these called functions. The
+ only way to do this, is to put these \emph{substates} inside the
+ caller's state. This means that a function's state is the sum of the
+ states of all functions it calls, and its own state. This sum
+ can be obtained using something simple like a tuple, or possibly
+ custom algebraic types for clarity.
+
+ This also means that the type of a function (at least the "state"
+ part) is dependent on its own implementation and of the functions it
+ calls.
+
+ This is the major downside of this approach: the separation between
+ interface and implementation is limited. However, since Cλash is not
+ very suitable for separate compilation this is not a big problem
+ in practice.
+
+ Additionally, when using a type synonym for the state type
+ of each function, we can still provide explicit type signatures
+ while keeping the state specification for a function near its
+ definition only.
+ \todo{Example}
- \starthaskell
- avg i --spacked-- = res
- where
- s = --case spacked of (State s) -> s--
- --accums = case s of (accums, \_) -> accums--
- count = case s of (--\_,-- count) -> count
- accumres = accum i --accums--
- --accums' = case accumres of (accums', \_) -> accums'--
- sum = case accumres of (--\_,-- sum) -> sum
- count' = count + 1
- o = sum / count'
- s' = (--accums',-- count')
- --spacked' = State s'--
- res = (--spacked',-- o)
- \stophaskell
-
- When we would really leave out the crossed out parts, we get a slightly
- weird program: There is a variable \type{s} which has no value, and there
- is a variable \type{s'} that is never used. Together, these two will form
- the state proc of the function. \type{s} contains the "current" state,
- \type{s'} is assigned the "next" state. So, at the end of each clock
- cycle, \type{s'} should be assigned to \type{s}.
-
- Note that the definition of \type{s'} is not removed, even though one
- might think it as having a state type. Since the state type has a single
- argument constructor \type{State}, some type that should be the resulting
- state should always be explicitly packed with the State constructor,
- allowing us to remove the packed version, but still generate \small{VHDL} for the
- unpacked version (of course with any substates removed).
-
- As you can see, the definition of \type{s'} is still present, since it
- does not have a state type (The State constructor. The \type{accums'} substate has been removed,
- leaving us just with the state of \type{avg} itself.
- \subsection{Initial state}
- How to specify the initial state? Cannot be done inside a hardware
- function, since the initial state is its own state argument for the first
- call (unless you add an explicit, synchronous reset port).
-
- External init state is natural for simulation.
+ \subsubsection{Which arguments and results are stateful?}
+ \fxnote{This section should get some examples}
+ We need some way to know which arguments should become input ports and
+ which argument(s?) should become the current state (\eg, be bound to
+ the register outputs). This does not hold just for the top
+ level function, but also for any sub-function. Or could we perhaps
+ deduce the statefulness of sub-functions by analyzing the flow of data
+ in the calling functions?
+
+ To explore this matter, the following observation is interesting: we
+ get completely correct behavior when we put all state registers in
+ the top level entity (or even outside of it). All of the state
+ arguments and results on sub-functions are treated as normal input and
+ output ports. Effectively, a stateful function results in a stateless
+ hardware component that has one of its input ports connected to the
+ output of a register and one of its output ports connected to the
+ input of the same register.
+
+ \todo{Example}
+
+ Of course, even though the hardware described like this has the
+ correct behavior, unless the layout tool does smart optimizations,
+ there will be a lot of extra wire in the design (since registers will
+ not be close to the component that uses them). Also, when working with
+ the generated \small{VHDL} code, there will be a lot of extra ports
+ just to pass on state values, which can get quite confusing.
+
+ To fix this, we can simply \quote{push} the registers down into the
+ sub-circuits. When we see a register that is connected directly to a
+ sub-circuit, we remove the corresponding input and output port and put
+ the register inside the sub-circuit instead. This is slightly less
+ trivial when looking at the Haskell code instead of the resulting
+ circuit, but the idea is still the same.
+
+ \todo{Example}
+
+ However, when applying this technique, we might push registers down
+ too far. When you intend to store a result of a stateless sub-function
+ in the caller's state and pass the current value of that state
+ variable to that same function, the register might get pushed down too
+ far. It is impossible to distinguish this case from similar code where
+ the called function is in fact stateful. From this we can conclude
+ that we have to either:
+
+ \todo{Example of wrong downpushing}
+
+ \startitemize
+ \item accept that the generated hardware might not be exactly what we
+ intended, in some specific cases. In most cases, the hardware will be
+ what we intended.
+ \item explicitly annotate state arguments and results in the input
+ description.
+ \stopitemize
+
+ The first option causes (non-obvious) exceptions in the language
+ interpretation. Also, automatically determining where registers should
+ end up is easier to implement correctly with explicit annotations, so
+ for these reasons we will look at how this annotations could work.
+
+ \todo{Sidenote: one or more state arguments?}
+
+ \subsection[sec:description:stateann]{Explicit state annotation}
+ To make our stateful descriptions unambiguous and easier to translate,
+ we need some way for the developer to describe which arguments and
+ results are intended to become stateful.
+
+ Roughly, we have two ways to achieve this:
+ \startitemize[KR]
+ \item Use some kind of annotation method or syntactic construction in
+ the language to indicate exactly which argument and (part of the)
+ result is stateful. This means that the annotation lives
+ \quote{outside} of the function, it is completely invisible when
+ looking at the function body.
+ \item Use some kind of annotation on the type level, \ie\ give stateful
+ arguments and stateful (parts of) results a different type. This has the
+ potential to make this annotation visible inside the function as well,
+ such that when looking at a value inside the function body you can
+ tell if it is stateful by looking at its type. This could possibly make
+ the translation process a lot easier, since less analysis of the
+ program flow might be required.
+ \stopitemize
- External init state works for hardware generation as well.
+ From these approaches, the type level \quote{annotations} have been
+ implemented in Cλash. \in{Section}[sec:prototype:statetype] expands on
+ the possible ways this could have been implemented.
- Implementation issues: state splitting, linking input to output state,
- checking usage constraints on state variables.
+ \todo{Note about conditions on state variables and checking them}
\section[sec:recursion]{Recursion}
- An import concept in functional languages is recursion. In it's most basic
- form, recursion is a function that is defined in terms of itself. This
+ An important concept in functional languages is recursion. In its most basic
+ form, recursion is a definition that is described in terms of itself. A
+ recursive function is thus a function that uses itself in its body. This
usually requires multiple evaluations of this function, with changing
arguments, until eventually an evaluation of the function no longer requires
itself.
- Recursion in a hardware description is a bit of a funny thing. Usually,
- recursion is associated with a lot of nondeterminism, stack overflows, but
- also flexibility and expressive power.
-
Given the notion that each function application will translate to a
component instantiation, we are presented with a problem. A recursive
function would translate to a component that contains itself. Or, more
problem for generating hardware.
This is expected for functions that describe infinite recursion. In that
- case, we can't generate hardware that shows correct behaviour in a single
+ case, we cannot generate hardware that shows correct behavior in a single
cycle (at best, we could generate hardware that needs an infinite number of
cycles to complete).
- However, most recursive hardware descriptions will describe finite
+ \placeintermezzo{}{
+ \startframedtext[width=8cm,background=box,frame=no]
+ \startalignment[center]
+ {\tfa \hs{null}, \hs{head} and \hs{tail}}
+ \stopalignment
+ \blank[medium]
+ The functions \hs{null}, \hs{head} and \hs{tail} are common list
+ functions in Haskell. The \hs{null} function simply checks if a list is
+ empty. The \hs{head} function returns the first element of a list. The
+ \hs{tail} function returns containing everything \emph{except} the first
+ element of a list.
+
+ In Cλash, there are vector versions of these functions, which do exactly
+ the same.
+ \stopframedtext
+ }
+
+ However, most recursive definitions will describe finite
recursion. This is because the recursive call is done conditionally. There
- is usually a case statement where at least one alternative does not contain
+ is usually a \hs{case} expression where at least one alternative does not contain
the recursive call, which we call the "base case". If, for each call to the
- recursive function, we would be able to detect which alternative applies,
- we would be able to remove the case expression and leave only the base case
- when it applies. This will ensure that expanding the recursive functions
- will terminate after a bounded number of expansions.
+ recursive function, we would be able to detect at compile time which
+ alternative applies, we would be able to remove the \hs{case} expression and
+ leave only the base case when it applies. This will ensure that expanding
+ the recursive functions will terminate after a bounded number of expansions.
This does imply the extra requirement that the base case is detectable at
compile time. In particular, this means that the decision between the base
- case and the recursive case must not depend on runtime data.
+ case and the recursive case must not depend on run-time data.
\subsection{List recursion}
The most common deciding factor in recursion is the length of a list that is
passed in as an argument. Since we represent lists as vectors that encode
the length in the vector type, it seems easy to determine the base case. We
can simply look at the argument type for this. However, it turns out that
- this is rather non-trivial to write down in Haskell in the first place. As
- an example, we would like to write down something like this:
+ this is rather non-trivial to write down in Haskell already, not even
+ looking at translation. As an example, we would like to write down something
+ like this:
\starthaskell
sum :: Vector n Word -> Word
False -> head xs + sum (tail xs)
\stophaskell
- However, the typechecker will now use the following reasoning (element type
- of the vector is left out):
+ However, the Haskell type-checker will now use the following reasoning.
+ For simplicity, the element type of a vector is left out, all vectors
+ are assumed to have the same element type. Below, we write conditions
+ on type variables before the \hs{=>} operator. This is not completely
+ valid Haskell syntax, but serves to illustrate the type-checker
+ reasoning. Also note that a vector can never have a negative length,
+ so \hs{Vector n} implicitly means \hs{(n >= 0) => Vector n}.
+ \todo{This type-checker disregards the type signature}
\startitemize
\item tail has the type \hs{(n > 0) => Vector n -> Vector (n - 1)}
\item This means that xs must have the type \hs{(n > 0) => Vector n}
\item This means that sum must have the type \hs{(n > 0) => Vector n -> a}
+ (The type \hs{a} is can be anything at this stage, we will not try to finds
+ its actual type in this example).
\item sum is called with the result of tail as an argument, which has the
- type \hs{Vector n} (since \hs{(n > 0) => n - 1 == m}).
+ type \hs{Vector n} (since \hs{(n > 0) => Vector (n - 1)} is the same as \hs{(n >= 0)
+ => Vector n}, which is the same as just \hs{Vector n}).
\item This means that sum must have the type \hs{Vector n -> a}
\item This is a contradiction between the type deduced from the body of sum
(the input vector must be non-empty) and the use of sum (the input vector
could have any length).
\stopitemize
- As you can see, using a simple case at value level causes the type checker
- to always typecheck both alternatives, which can't be done! This is a
- fundamental problem, that would seem perfectly suited for a type class.
- Considering that we need to switch between to implementations of the sum
- function, based on the type of the argument, this sounds like the perfect
- problem to solve with a type class. However, this approach has its own
- problems (not the least of them that you need to define a new typeclass for
- every recursive function you want to define).
-
- Another approach tried involved using GADTs to be able to do pattern
- matching on empty / non empty lists. While this worked partially, it also
- created problems with more complex expressions.
-
- TODO: How much detail should there be here? I can probably refer to
- Christiaan instead.
-
- Evaluating all possible (and non-possible) ways to add recursion to our
- descriptions, it seems better to leave out list recursion alltogether. This
- allows us to focus on other interesting areas instead. By including
- (builtin) support for a number of higher order functions like map and fold,
- we can still express most of the things we would use list recursion for.
-
+ As you can see, using a simple \hs{case} expression at value level causes
+ the type checker to always type-check both alternatives, which cannot be
+ done. The type-checker is unable to distinguish the two case
+ alternatives (this is partly possible using \small{GADT}s, but that
+ approach faced other problems \todo{ref christiaan?}).
+
+ This is a fundamental problem, that would seem perfectly suited for a
+ type class. Considering that we need to switch between to
+ implementations of the sum function, based on the type of the
+ argument, this sounds like the perfect problem to solve with a type
+ class. However, this approach has its own problems (not the least of
+ them that you need to define a new type class for every recursive
+ function you want to define).
+
+ \todo{This should reference Christiaan}
+
\subsection{General recursion}
Of course there are other forms of recursion, that do not depend on the
length (and thus type) of a list. For example, simple recursion using a
counter could be expressed, but only translated to hardware for a fixed
number of iterations. Also, this would require extensive support for compile
time simplification (constant propagation) and compile time evaluation
- (evaluation constant comparisons), to ensure non-termination. Even then, it
- is hard to really guarantee termination, since the user (or GHC desugarer)
- might use some obscure notation that results in a corner case of the
- simplifier that is not caught and thus non-termination.
+ (evaluation of constant comparisons), to ensure non-termination.
+ Supporting general recursion will probably require strict conditions
+ on the input descriptions. Even then, it will be hard (if not
+ impossible) to really guarantee termination, since the user (or \GHC\
+ desugarer) might use some obscure notation that results in a corner
+ case of the simplifier that is not caught and thus non-termination.
+
+ Evaluating all possible (and non-possible) ways to add recursion to
+ our descriptions, it seems better to limit the scope of this research
+ to exclude recursion. This allows for focusing on other interesting
+ areas instead. By including (built-in) support for a number of
+ higher-order functions like \hs{map} and \hs{fold}, we can still
+ express most of the things we would use (list) recursion for.
+
- Due to these complications, we leave other forms of recursion as
- future work as well.
+% vim: set sw=2 sts=2 expandtab:
projects / matthijs / master-project / report.git / blobdiff