Introduction * Goals * Outline *Context * Other FHDLs (short, Christiaan has details) * Advantages of clash / why clash? Haskell as hardware * Simple function -> component interpretation (Model: Structure) * Partial application * Model: State * Explicit vs implicit passing of state (e.g, delay) * Explicit vs implicit marking * Interpret: Polymorphism * Interpret: Higher order Need: Dependent types * Recursion Impossible things: Infinite recursion, higher order expressions, recursive types, ... Prototype * Choice of Haskell VHDL / Verilog / EDIF etc. Why VHDL? * Stages (-> Core, Normalization, -> VHDL) . Core - description of the language (appendix?) Implementation issues -- Which? State annotations Haskell language coverage / constraints Recursion Builtin types Custom types (Sum types, product types) Function types / higher order expressions State type -> Anything representable Normalization * Normal form * Rules used . Properties / Proofs (termination, soundness, completeness, determinism) Casts / Strictness / Casebinders not fully supported Future work . Boilerplate reduction (State distribution & pipelining) * Recursion * Multiple time domains (Events) -- Also, clock line optimization / -- write enable * Multiple cycle descriptions * Higher order state * New language TODO: Define user / developer