From: Christiaan Baaij Date: Wed, 26 Aug 2009 21:29:53 +0000 (+0200) Subject: Fix some unhiding. Add some nodes X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fhaskell-symposium-talk.git;a=commitdiff_plain;h=715d9487c4e666cef21e89f0735d23a4f5ab2d27 Fix some unhiding. Add some nodes --- diff --git a/PolyAlu.lhs b/PolyAlu.lhs index 0d99ca7..842da23 100644 --- a/PolyAlu.lhs +++ b/PolyAlu.lhs @@ -12,10 +12,10 @@ import qualified Prelude as P \subsection{Introduction} \frame { -\frametitle{Small Use Case} +\frametitle{Small Use Case}\pause \begin{itemize} - \item Small Polymorphic, Higher-Order CPU - \item Each function is turned into a hardware component + \item Small Polymorphic, Higher-Order CPU\pause + \item Each function is turned into a hardware component\pause \item Use of state will be simple \end{itemize} }\note[itemize]{ @@ -27,7 +27,7 @@ import qualified Prelude as P \frame { -\frametitle{Imports} +\frametitle{Imports}\pause Import all the built-in types, such as vectors and integers: \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox} \begin{code} @@ -49,7 +49,7 @@ import CLasH.Translator.Annotations \subsection{Type Definitions} \frame { -\frametitle{Type definitions} +\frametitle{Type definitions}\pause First we define some ALU types: \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox} \begin{code} @@ -82,11 +82,11 @@ type Word = SizedInt D12 \subsection{Frameworks for Operations} \frame { -\frametitle{Operations} +\frametitle{Operations}\pause We make a primitive operation: \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox} \begin{code} -primOp :: {-"{\color<3>[rgb]{1,0,0}"-}(a -> a -> a){-"}"-} -> Op s a +primOp :: {-"{\color<4>[rgb]{1,0,0}"-}(a -> a -> a){-"}"-} -> Op s a primOp f a b = a `f` a \end{code} \end{beamercolorbox}\pause @@ -94,12 +94,12 @@ primOp f a b = a `f` a We make a vector operation: \begin{beamercolorbox}[sep=-2.5ex,rounded=true,shadow=true,vmode]{codebox} \begin{code} -vectOp :: {-"{\color<3>[rgb]{1,0,0}"-}(a -> a -> a){-"}"-} -> Op s a -vectOp f a b = {-"{\color<3>[rgb]{1,0,0}"-}foldl{-"}"-} f a b +vectOp :: {-"{\color<4>[rgb]{1,0,0}"-}(a -> a -> a){-"}"-} -> Op s a +vectOp f a b = {-"{\color<4>[rgb]{1,0,0}"-}foldl{-"}"-} f a b \end{code} \end{beamercolorbox} \begin{itemize} -\uncover<3->{\item We support Higher-Order Functionality} +\uncover<4->{\item We support Higher-Order Functionality} \end{itemize} }\note[itemize]{ \item These are just frameworks for 'real' operations diff --git a/clash-haskell09.pdf b/clash-haskell09.pdf index 1600377..46bdb66 100644 Binary files a/clash-haskell09.pdf and b/clash-haskell09.pdf differ diff --git a/howdoesitwork.lhs b/howdoesitwork.lhs index 4ad7780..342be54 100644 --- a/howdoesitwork.lhs +++ b/howdoesitwork.lhs @@ -2,8 +2,8 @@ \section{How do you make Hardware from Haskell?} \frame { - \frametitle{So how do you make Hardware from Haskell?} - \large{In three simple steps} \pause + \frametitle{So how do you make Hardware from Haskell?}\pause + \large{In three simple steps really:} \pause \begin{itemize} \item No Effort:\\ GHC API Parses, Typechecks and Desugars the Haskell code \pause @@ -14,5 +14,7 @@ \end{itemize} }\note[itemize]{ \item Here is a quick insight as to how WE translate Haskell to Hardware -\item You can also use TH, like ForSyDe. Or traverse datastructures, like Lava. +\item You can also use TH, like ForSyDe. Or traverse datastructures, like +\item We're in luck with the GHC API update of 6.10 and onwards +\item Normal form is a single lamda and a let expression, every let binder is a simple assignment } \ No newline at end of file diff --git a/introduction.lhs b/introduction.lhs index b414dac..1066173 100644 --- a/introduction.lhs +++ b/introduction.lhs @@ -3,11 +3,11 @@ \subsection{What is \texorpdfstring{\clash{}}{CLasH}} \frame { - \frametitle{What is \clash{}?} + \frametitle{What is \clash{}?}\pause \begin{itemize} - \item \clash{}: CAES Language for Hardware Descriptions - \item Rapid prototyping language - \item Subset of Haskell can be translated to Hardware (VHDL) + \item \clash{}: CAES Language for Hardware Descriptions\pause + \item Rapid prototyping language\pause + \item Subset of Haskell can be translated to Hardware (VHDL)\pause \item Structural Description of a Mealy Machine \end{itemize} } diff --git a/reducer.lhs b/reducer.lhs index cf97b3f..f71d1f6 100644 --- a/reducer.lhs +++ b/reducer.lhs @@ -4,8 +4,8 @@ \pause \begin{itemize} \item We designed a matrix reduction circuit\pause - \item Simulation results in Haskell match VHDL simulation results - \item Synthesis completes without errors or warnings + \item Simulation results in Haskell match VHDL simulation results\pause + \item Synthesis completes without errors or warnings\pause \item It runs at half the speed of a hand-coded VHDL design \end{itemize} }\note[itemize]{