X-Git-Url: https://git.stderr.nl/gitweb?p=matthijs%2Fmaster-project%2Fhaskell-symposium-talk.git;a=blobdiff_plain;f=reducer.lhs;h=061f9dbc85da8df260ad574aae2970c988862cab;hp=cf97b3fe7cd104d0e9c2a71ed955e0c1a3d6f55f;hb=HEAD;hpb=2523b691bc4f9871e5d0fb3823fcd2c8952affaa

diff --git a/reducer.lhs b/reducer.lhs
index cf97b3f..061f9db 100644
--- a/reducer.lhs
+++ b/reducer.lhs
@@ -2,15 +2,30 @@
 \frame{
 \frametitle{More than just toys}
 \pause
+\begin{columns}[l]
+\column{0.5\textwidth}
+\begin{figure}
+\includegraphics<2->[width=5.5cm]{reducer}
+\end{figure}
+\column{0.5\textwidth}
 \begin{itemize}
-  \item We designed a matrix reduction circuit\pause
-  \item Simulation results in Haskell match VHDL simulation results
-  \item Synthesis completes without errors or warnings
-  \item It runs at half the speed of a hand-coded VHDL design
+  \item We implemented a reduction circuit in \clash{}\pause
+  \item Simulated in Haskell. VHDL simulation results match\pause
+  \item Synthesis completes without errors or warnings\pause
+  \item Around half speed of handcoded and optimized VHDL
 \end{itemize}
+\end{columns}
 }\note[itemize]{
 \item Toys like the poly cpu one are good to give a quick demo
 \item But we used \clash{} to design 'real' hardware
-\item Reduction circuit sums the numbers in a row of a (sparse) matrix
-\item Half speed is nice, considering we don't optimize for speed
-}
\ No newline at end of file
+\item Reduction circuit sums the numbers in a row, of different length
+\item It uses a pipelined adder: multiple rows in pipeline, rows longer than pipeline
+\item We hope you see this is not a trivial problem
+\item Nice speed considering we don't optimize for it (only single example!)
+}
+
+% \begin{frame}[plain] 
+%    \begin{centering} 
+%       \includegraphics[height=\paperheight]{reducerschematic.png} 
+%       \end{centering} 
+% \end{frame}